Unofficial Qualcomm Atheros drivers website

32bit INF file from Atheros driver v2.1.0.26

32bit INF file from Qualcomm Atheros driver v2.1.0.26

An INF file is a plain text file that contains all the information that device installation components used to install a driver. Windows installs drivers using INF files. This information includes the following: Driver name and location, Driver version information and Registry information. The INF file exactly defines which types of cards are supported.

|Look at the INF file|Sehen Sie in der INF-Datei|Посмотрите файл INF|Regardez le fichier INF|INF फ़ाइल को देखो|Mira el archivo INF|Olhe para o arquivo INF|Κοιτάξτε το αρχείο INF|看INF文件|Spójrz na plik INF|INFファイルを見てください|


32bit INF file from Qualcomm Atheros driver v2.1.0.26 (for Windows 10)

;This INF file intended for Windows 10 32bit
;Note: The INF file has a size of 420,34 KB !!!
;
;
;
;*****************************************************************************
;*
;* L1C63x86.INF - Qualcomm Atheros AR813X/AR815X/816X Series PCI-E Ethernet Controller
;* Copyright 2012-, Qualcomm Atheros Co., Ltd.
;*
;* Created on 02/13/2012 by Yu Hao
;* INF File for NDIS6.3 Miniport Driver for Windows8 x86
;*
;*****************************************************************************
[Version]
Signature = "$Windows NT$"
Class = Net
ClassGUID = {4d36e972-e325-11ce-bfc1-08002be10318}
Provider = %ATHR%
CatalogFile = netl1cx86.cat
DriverVer=09/09/2016,2.1.0.26


[Manufacturer]
%ATHR% = Atheros, NTx86

[ControlFlags]

ExcludeFromSelect = *

[Atheros]

[Atheros.NTx86]
; DisplayName Section DeviceID
; ----------- ------- --------
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063 ; L1C
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_10631969&REV_C0

%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_83041043&REV_C0 ; ASUS
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_83FE1043&REV_C0 ; ASUS
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_84921043&REV_C0 ; ASUS
%ATHR.L1C% = L1C.DisS5.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_18201043&REV_C0 ; ASUS
%ATHR.L1C% = L1C.DisS5.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_18301043&REV_C0 ; ASUS

%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_10631849&REV_C0 ; Asrock

%ATHR.L1C% = L1C.ShutOn.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_20081854&REV_C0 ; Pegatron
%ATHR.L1C% = L1C.ShutOn.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_20091854&REV_C0 ; Pegatron
%ATHR.L1C% = L1C.ShutOn.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_FF101854&REV_C0 ; Pegatron
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_202F1B0A&REV_C0 ; Pegatron
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_00C31B0A&REV_C0 ; Pegatron
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_00C91B0A&REV_C0 ; Pegatron

%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_10D217C0&REV_C0 ; M10B1
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_10D717C0&REV_C0 ; Dagger

%ATHR.L1C% = L1C.Lenovo.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_394E17AA&REV_C0 ; NAUR2,NAWA
%ATHR.L1C% = L1C.Lenovo.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_395817AA&REV_C0 ; NIMUA/B
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_395617AA&REV_C0 ; LU16_INTEL
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_396117AA&REV_C0 ; LU16_AMD

%ATHR.L1C% = L1C.GIGABYTE.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_E0001458&REV_C0 ; GIGABYTE

%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_81311019&REV_C0 ; ECS

%ATHR.L1C% = L1C.Toshiba.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_FF501179&REV_C0 ; TZ2

%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_02291025&REV_C0 ; JM31
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_027F1025&REV_C0 ; JM31
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_02801025&REV_C0 ; JM31
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_02381025&REV_C0 ; SJM31
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_02811025&REV_C0 ; SJM31
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_02821025&REV_C0 ; SJM31
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_03021025&REV_C0 ; SJM52
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_03031025&REV_C0 ; SJM52
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_03041025&REV_C0 ; SJM52
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_022A1025&REV_C0 ; JM41
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_022B1025&REV_C0 ; JM51
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_034B1025&REV_C0 ; NCL20
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_04301025&REV_C0 ; SJM40
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_04311025&REV_C0 ; SJM40
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_04321025&REV_C0 ; SJM40
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_04331025&REV_C0 ; SJM40
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_04341025&REV_C0 ; SJM40
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_04111025&REV_C0 ; NCWH1
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_041C1025&REV_C0 ; SJM30
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_041D1025&REV_C0 ; SJM30
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_042B1025&REV_C0 ; SJM50
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_042C1025&REV_C0 ; SJM30
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_04201025&REV_C0 ; SJM50NP_UMA
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_04211025&REV_C0 ; SJM50NP_UMA
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_041E1025&REV_C0 ; SJM50CP_UMA
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_041F1025&REV_C0 ; SJM50CP_DIS
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_04501025&REV_C0 ; SJM40
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_044F1025&REV_C0 ; SJM40
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_049B1025&REV_C0 ; HM55_MV

%ATHR.L1C% = L1C.SONY.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_390217AA&REV_C0 ; LU15
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_395617AA&REV_C0 ; LA46

%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_01671025&REV_C0 ; KAL90
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_021B1025&REV_C0 ; KBLG0
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_02601025&REV_C0 ; KALG0
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_027D1025&REV_C0 ; NBLG0
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_01281025&REV_C0 ; KALH0

%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_004214C0&REV_C0 ; NBLB1
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_004314C0&REV_C0 ; NBLB2
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_004514C0&REV_C0 ; NTTB1
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_004614C0&REV_C0 ; NTUC0

%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_021E1025&REV_C0 ; ZK6
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_02531025&REV_C0 ; ZR6
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_026A1025&REV_C0 ; ZK8
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_026D1025&REV_C0 ; ZK8
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_026E1025&REV_C0 ; ZK8
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_029B1025&REV_C0 ; ZH7
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_029F1025&REV_C0 ; ZH8
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_029E1025&REV_C0 ; ZH6
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_03001025&REV_C0 ; ZE8
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_029D1025&REV_C0 ; ZE9
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_03321025&REV_C0 ; ZH9

%ATHR.L1C% = L1C.ShutOn.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_7009103C&REV_C0 ; SP7
%ATHR.L1C% = L1C.ShutOn.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_1522103C&REV_C0 ; Nikita
%ATHR.L1C% = L1C.ShutOn.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_147D103C&REV_C0 ; Nikita1.2

%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_1411103C&REV_C0 ; ZENO
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_1412103C&REV_C0 ; ZENO
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_1413103C&REV_C0 ; ZENO
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_142C103C&REV_C0 ; PETEK
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_142D103C&REV_C0 ; PETEK
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_1421103C&REV_C0 ; Hamilton
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_1423103C&REV_C0 ; Hamilton
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_1420103C&REV_C0 ; Prano
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_142B103C&REV_C0 ; Prano

%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0D4E105B&REV_C0 ; AJ-BOX
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0D52105B&REV_C0 ; AJ-BOX-N
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0CD9105B&REV_C0 ; Clone
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0D56105B&REV_C0 ; Clone
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0CDA105B&REV_C0 ; Clone
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0E35105B&REV_C0 ; Clone
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0D57105B&REV_C0 ; Clone
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0CFC105B&REV_C0 ; Clone
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0CFD105B&REV_C0 ; Clone
%ATHR.L1C% = L1C.ShutOn.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0DC5105B&REV_C0 ; Clone

%ATHR.L1C% = L1C.WOLMagic.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_07991854&REV_C0 ; QL2
%ATHR.L1C% = L1C.WOLMagic.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_08001854&REV_C0 ; QL2
%ATHR.L1C% = L1C.WOLMagic.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_08031854&REV_C0 ; QL4
%ATHR.L1C% = L1C.WOLMagic.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_08041854&REV_C0 ; QL4
%ATHR.L1C% = L1C.WOLMagic.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_08051854&REV_C0 ; QL2
%ATHR.L1C% = L1C.WOLMagic.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_08071854&REV_C0 ; QL4
%ATHR.L1C% = L1C.WOLMagic.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_08211854&REV_C0 ; QL4
%ATHR.L1C% = L1C.WOLMagic.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_08321854&REV_C0 ; QL4
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_20101854&REV_C0 ; PEGATRON
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_20111854&REV_C0 ; PEGATRON

%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0809152D&REV_C0 ; SW9
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0810152D&REV_C0 ; SW9
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0812152D&REV_C0 ; TW9
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0813152D&REV_C0 ; TW9
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0814152D&REV_C0 ; SW9
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0815152D&REV_C0 ; TW9
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0822152D&REV_C0 ; TW9
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0828152D&REV_C0 ; TW9
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0831152D&REV_C0 ; TW9A
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0835152D&REV_C0 ; SW9
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0852152D&REV_C0 ; TW9D
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0853152D&REV_C0 ; TW9D
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0854152D&REV_C0 ; TW9E
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0855152D&REV_C0 ; SW9
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_0856152D&REV_C0 ; SW9D

%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_041E1028&REV_C0 ; Dell-DC1
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_041F1028&REV_C0 ; Dell-DC2

%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_906A104D&REV_C0 ; NEO
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_9069104D&REV_C0 ; NEO
%ATHR.L1C% = L1C.SONY.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_906F104D&REV_C0 ; Sony
%ATHR.L1C% = L1C.SONY.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_9076104D&REV_C0 ; Cadiz
%ATHR.L1C% = L1C.WOLMagic.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_906C104D&REV_C0 ; TW6
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_907C104D&REV_C0 ; Tucana
%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_9082104D&REV_C0 ; Tucana-BR

%ATHR.L1C% = L1C.ndi, PCI\VEN_1969&DEV_1063&SUBSYS_10D217C0&REV_C0 ; M10B1

%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062 ; L2C
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_10621969&REV_C0 ;

%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_83041043&REV_C0 ; ASUS
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_83FF1043&REV_C0 ; ASUS
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_838A1043&REV_C0 ; EEEPC
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_83BE1043&REV_C0 ; EEEPC
%ATHR.L2C% = L2C.DisS5.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_14E51043&REV_C0 ; F50Q
%ATHR.L2C% = L2C.DisS5.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_15251043&REV_C0 ; ASUS

%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_10621849&REV_C0 ; Asrock

%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_81321019&REV_C0 ; ECS

%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_20261B0A&REV_C0 ; PEGATRON
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_1598103C&REV_C0 ; PEGATRON
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_2ACC103C&REV_C0 ; PEGATRON
%ATHR.L2C% = L2C.WOLMagic.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_00AA1B0A&REV_C0 ; PEGATRON
%ATHR.L2C% = L2C.ShutOn.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_20081854&REV_C0 ; PEGATRON
%ATHR.L2C% = L2C.ShutOn.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_20091854&REV_C0 ; PEGATRON
%ATHR.L2C% = L2C.ShutOn.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_200A1854&REV_C0 ; PEGATRON
%ATHR.L2C% = L2C.ShutOn.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_200B1854&REV_C0 ; PEGATRON
%ATHR.L2C% = L2C.ShutOn.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_200D1854&REV_C0 ; PEGATRON, H00J
%ATHR.L2C% = L2C.ShutOn.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_200E1854&REV_C0 ; PEGATRON
%ATHR.L2C% = L2C.ShutOn.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_00E01B0A&REV_C0 ; PEGATRON

%ATHR.L2C% = L2C.GIGABYTE.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_E0001458&REV_C0 ; GIGABYTE

%ATHR.L2C% = L2C.Lenovo.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_394F17AA&REV_C0 ; NAUR2,NAWA
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_38A317AA&REV_C0 ; LA14
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_395617AA&REV_C0 ; LA46
%ATHR.L2C% = L2C.Lenovo.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_395817AA&REV_C0 ; NIMUA/B

%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_019C1025&REV_C0 ; KAV10
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_02101025&REV_C0 ; KAWH0
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_02111025&REV_C0 ; KBWH0
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_02121025&REV_C0 ; KAWF0
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_02131025&REV_C0 ; KAWG0
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_02141025&REV_C0 ; HM40-MV
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_02151025&REV_C0 ; HM40-YK
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_02161025&REV_C0 ; HM20-YK
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_019D1025&REV_C0 ;
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_022E1025&REV_C0 ; KAW10
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_022F1025&REV_C0 ; KAV50
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_02301025&REV_C0 ; KAV60
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_02411025&REV_C0 ; KAV80
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_02431025&REV_C0 ; KAVA0
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_02601025&REV_C0 ; KALG0
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_028D1025&REV_C0 ; HM50/70-PU
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_03491025&REV_C0 ; NAV50
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_034A1025&REV_C0 ; NAV60
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_030D1025&REV_C0 ; HM41
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_03501025&REV_C0 ; HM50/51/70
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_04111025&REV_C0 ; NCWH1
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_04391025&REV_C0 ; NAVD0
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_043A1025&REV_C0 ; NAVD0
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_043B1025&REV_C0 ; NAVE0
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_043C1025&REV_C0 ; NAVE0
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_04591025&REV_C0 ; JE50_MV
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_045A1025&REV_C0 ; HM52_MV
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_045B1025&REV_C0 ; BA51_MV
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_04971025&REV_C0 ; PAV50

%ATHR.L2C% = L2C.ShutOn.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_308F103C&REV_C0 ; BIXBY
%ATHR.L2C% = L2C.ShutOn.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_1468103C&REV_C0 ; BIXBY 2.0
%ATHR.L2C% = L2C.ShutOn.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_1492103C ;

%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_0820152D&REV_C0 ; UW2

%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_04091028&REV_C0 ; ARGOS
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_04431028&REV_C0 ; Phantom
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_04511028&REV_C0 ; DJ
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_04521028&REV_C0 ; DJ
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_04531028&REV_C0 ; DJ
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_04541028&REV_C0 ; DJ
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_04651028&REV_C0 ; NAP10
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_04661028&REV_C0 ; DJx
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_04701028&REV_C0 ; NLM01
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_04711028&REV_C0 ; NLM00
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_046F1028&REV_C0 ; DJ1_AMD
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_04A61028&REV_C0 ; DJ2_MV
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_049E1028&REV_C0 ; DJ2_AMD
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_049F1028&REV_C0 ; DJ2_CP_UMA
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_04A01028&REV_C0 ; DJ2_CP_DIS

%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_004414C0&REV_C0 ; NTTB0
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_004714C0&REV_C0 ; NTV00/10

%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_022C1025&REV_C0 ; ZG8
%ATHR.L2C% = L2C.Toshiba.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_FF501179&REV_C0 ; TZ2
%ATHR.L2C% = L2C.Toshiba.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_FFE01179&REV_C0 ; BU3
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_0790152D&REV_C0 ; IN1
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_02441025&REV_C0 ; ZA3
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_9064104D&REV_C0 ; SY2
%ATHR.L2C% = L2C.ndi, PCI\VEN_1969&DEV_1062&SUBSYS_9066104D&REV_C0 ; SY3

%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060 ; L2cB
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_20601969&REV_C1 ; L2cB

%ATHR.L2CB% = L2CB.PWMAll.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_FF1E1179&REV_C1 ; IEC
%ATHR.L2CB% = L2CB.PWMAll.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_FDD01179&REV_C1 ; TE6

%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_04511028&REV_C1 ; DJ1_MV
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_04551028&REV_C1 ; UM7
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_04561028&REV_C1 ; UM8
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_04571028&REV_C1 ; UM9
%ATHR.L2CB% = L2CB.ASPM1.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_04661028&REV_C1 ; DJ1_CP
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_046F1028&REV_C1 ; DJ1_AMD
%ATHR.L2CB% = L2CB.ASPM1.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_04861028&REV_C1 ; DJ2_CP
%ATHR.L2CB% = L2CB.ASPM1.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_04871028&REV_C1 ; DJ2_AMD
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_048F1028&REV_C1 ; Dell_Avenger
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_04901028&REV_C1 ; Dell_Voyager
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_04A61028&REV_C1 ; DJ2_MV
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_049E1028&REV_C1 ; DJ2_AMD
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_049F1028&REV_C1 ; DJ2_CP_UMA
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_04A01028&REV_C1 ; DJ2_CP_DIS
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_04DF1028&REV_C1 ; Andros MLK

%ATHR.L2CB% = L2CB.ShutOn.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_147E103C&REV_C1 ; Bixby 3.0

%ATHR.L2CB% = L2CB.ShutOn.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_FD501179&REV_C1 ; TE2
%ATHR.L2CB% = L2CB.ShutOn.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_FDD01179&REV_C1 ; BL6

%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_04291025&REV_C1 ; ZH9
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_043D1025&REV_C1 ; ZH9
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_043E1025&REV_C1 ; ZH9AB
%ATHR.L2CB% = L2CB.ASPM1.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_03491025&REV_C1 ; NAV70
%ATHR.L2CB% = L2CB.ASPM1.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_034A1025&REV_C1 ; NAV80
%ATHR.L2CB% = L2CB.ASPM1.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_04971025&REV_C1 ; PAV50
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_048A1025&REV_C1 ; PEW72
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_05431025&REV_C1 ; P0VE6
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_05441025&REV_C1 ; P0VS6

%ATHR.L2CB% = L2CB.DisS5.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_396517AA&REV_C1 ; LL7
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_396B17AA&REV_C1 ; NAWEx
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_397917AA&REV_C1 ; PIWG1/2/3
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_397B17AA&REV_C1 ; PAWGx
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_398317AA&REV_C1 ; PAW10/20

%ATHR.L2CB% = L2CB.MB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_81521019&REV_C1 ; ECS
%ATHR.L2CB% = L2CB.MB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_20601019&REV_C1 ; ECS

%ATHR.L2CB% = L2CB.FUJU.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_15DB10CF&REV_C1 ; UME

%ATHR.L2CB% = L2CB.DisS5.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_18501043&REV_C1 ; ASUS
%ATHR.L2CB% = L2CB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_84681043&REV_C1 ; ASUS

%ATHR.L2CB% = L2CB.MB.ndi, PCI\VEN_1969&DEV_2060&SUBSYS_E0001458&REV_C1 ; GIGABYTE

%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073 ; L1d
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_10731969&REV_C0 ; L1d

%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_03561025&REV_C0 ; ZQ1
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_03571025&REV_C0 ; ZQ1
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_03581025&REV_C0 ; ZQ1B
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_03591025&REV_C0 ; ZQ1B
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_035A1025&REV_C0 ; ZR7
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_035B1025&REV_C0 ; ZR7
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_035C1025&REV_C0 ; ZR7B
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_035D1025&REV_C0 ; ZR7B
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_035E1025&REV_C0 ; ZQ2
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_03601025&REV_C0 ; ZR8
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_03621025&REV_C0 ; ZR8B
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_03661025&REV_C0 ; ZQ2B
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_03641025&REV_C0 ; JM31
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_03671025&REV_C0 ; ZYA
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_03681025&REV_C0 ; ZYA
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_038B1025&REV_C0 ; ZYB
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_038C1025&REV_C0 ; ZYB
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_04121025&REV_C0 ; ZYD
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_040E1025&REV_C0 ; JV10
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_04281025&REV_C0 ; SJV10
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_04291025&REV_C0 ; JV10_NL
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_040D1025&REV_C0 ; SJV10_NL
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_04601025&REV_C0 ; JV10_CP
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_045F1025&REV_C0 ; JV10_NL
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_04631025&REV_C0 ; ZR7D
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_04641025&REV_C0 ; JV53_CP
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_04651025&REV_C0 ; JV53_CP
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_04731025&REV_C0 ; SJM70_CP
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_04751025&REV_C0 ; SJM70_CP
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_04761025&REV_C0 ; SJM70_CP
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_047E1025&REV_C0 ; PAU30
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_048A1025&REV_C0 ; PEW72
%ATHR.L1D% = L1D.TxPerf.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_050E1025&REV_C0 ; P7YE0
%ATHR.L1D% = L1D.TxPerf.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_050F1025&REV_C0 ; P7YE0
%ATHR.L1D% = L1D.TxPerf.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_05131025&REV_C0 ; P7YS0
%ATHR.L1D% = L1D.TxPerf.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_05141025&REV_C0 ; P7YS0
%ATHR.L1D% = L1D.TxPerf.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_05151025&REV_C0 ; P7YH0
%ATHR.L1D% = L1D.TxPerf.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_05161025&REV_C0 ; P7YH0
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_054C1025&REV_C0 ; JM30
%ATHR.L1D% = L1D.TxPerf.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_054E1025&REV_C0 ; JM30
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_05221025&REV_C0 ; JE73
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_05231025&REV_C0 ; JE73
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_05241025&REV_C0 ; SJ53
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_052A1025&REV_C0 ; SJ53
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_05571025&REV_C0 ; JE41
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_055F1025&REV_C0 ; JE51
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_054B1025&REV_C0 ; HM51
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_054D1025&REV_C0 ; HM51
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_054F1025&REV_C0 ; JM40
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_055B1025&REV_C0 ; JM50
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_05711025&REV_C0 ; SJM40
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_056D1025&REV_C0 ; BA70
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_056F1025&REV_C0 ; SJM50

%ATHR.L1D% = L1D.ShutOn.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_FD501179&REV_C0 ; TE2
%ATHR.L1D% = L1D.ShutOn.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_FDD01179&REV_C0 ; BL6
%ATHR.L1D% = L1D.ToPatch.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_FF1E1179&REV_C0 ; Berlin

%ATHR.L1D% = L1D.DisS5.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_395B17AA&REV_C0 ; NAU00
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_396A17AA&REV_C0 ; NAWEx
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_395817AA&REV_C0 ; NIUM1
%ATHR.L1D% = L1D.TxPerf.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_397917AA&REV_C0 ; PIWG1/2/3
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_397B17AA&REV_C0 ; PAWGx
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_398317AA&REV_C0 ; PAW10/20

%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_0CDD105B&REV_C0 ; W930
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_0D5E105B&REV_C0 ; Haier
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_0DBE105B&REV_C0 ; Clone

%ATHR.L1D% = L1D.MB.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_81511019&REV_C0 ; ECS
%ATHR.L1D% = L1D.MB.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_10731019&REV_C0 ; ECS
%ATHR.L1D% = L1D.ECSD.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_04731028&REV_C0 ; ECS/Dell

%ATHR.L1D% = L1D.DisS5.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_18041043&REV_C0 ; ASUS
%ATHR.L1D% = L1D.DisS5.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_18401043&REV_C0 ; ASUS

%ATHR.L1D% = L1D.MB.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_E0001458&REV_C0 ; GIGABYTE

%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_04511028&REV_C0 ; DJ1_MV
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_04661028&REV_C0 ; DJ1_CP
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_046F1028&REV_C0 ; DJ1_AMD
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_04861028&REV_C0 ; DJ2_CP
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_04871028&REV_C0 ; DJ2_AMD
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_048F1028&REV_C0 ; Dell_Avenger
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_04901028&REV_C0 ; Dell_Voyager
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_04A61028&REV_C0 ; DJ2_MV
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_049E1028&REV_C0 ; DJ2_AMD
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_049F1028&REV_C0 ; DJ2_CP_UMA
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_04A01028&REV_C0 ; DJ2_CP_DIS
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_04911028&REV_C0 ; Spector
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_04C81028&REV_C0 ; Alienware

%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_2AAE103C&REV_C0 ; Pegatron
%ATHR.L1D% = L1D.ShutOn.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_207D1B0A&REV_C0 ; Pegatron

%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_08611854&REV_C0 ; QLH
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_08621854&REV_C0 ; QLH
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_08631854&REV_C0 ; QLH
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_08641854&REV_C0 ; QLH
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_08651854&REV_C0 ; QLH
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_08661854&REV_C0 ; QLA
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_08671854&REV_C0 ; QLA
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_08681854&REV_C0 ; QLA
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_08691854&REV_C0 ; QLC
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_08701854&REV_C0 ; QLC
%ATHR.L1D% = L1D.ndi, PCI\VEN_1969&DEV_1073&SUBSYS_08711854&REV_C0 ; QLC

%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062 ; L2cb 2.0
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_20621969&REV_C0

%ATHR.L2CB% = L2CB2.ASPM1.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04861028&REV_C0 ; DJ2_CP
%ATHR.L2CB% = L2CB2.ASPM1.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04871028&REV_C0 ; DJ2_AMD
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04511028&REV_C0 ; DJ1_MV
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04551028&REV_C0 ; UM7
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04561028&REV_C0 ; UM8
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04571028&REV_C0 ; UM9
%ATHR.L2CB% = L2CB2.ASPM1.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04661028&REV_C0 ; DJ1_CP
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_046F1028&REV_C0 ; DJ1_AMD
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_048F1028&REV_C0 ; Dell_Avenger
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04901028&REV_C0 ; Dell_Voyager
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04A61028&REV_C0 ; DJ2_MV
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_049E1028&REV_C0 ; DJ2_AMD
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_049F1028&REV_C0 ; DJ2_CP_UMA
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04A01028&REV_C0 ; DJ2_CP_DIS

%ATHR.L2CB% = L2CB2.ShutOn.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FD501179&REV_C0 ; TE2
%ATHR.L2CB% = L2CB2.ShutOn.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FDD01179&REV_C0 ; BL6
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FF1E1179&REV_C0 ; IEC

%ATHR.L2CB% = L2CB2.ShutOn.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_147E103C&REV_C0 ; Bixby 3.0

%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04291025&REV_C0 ; ZH9
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_043D1025&REV_C0 ; ZH9
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_043E1025&REV_C0 ; ZH9AB
%ATHR.L2CB% = L2CB2.ASPM1.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_03491025&REV_C0 ; NAV70
%ATHR.L2CB% = L2CB2.ASPM1.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_034A1025&REV_C0 ; NAV80
%ATHR.L2CB% = L2CB2.ASPM1.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04971025&REV_C0 ; PAV50
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_048A1025&REV_C0 ; PEW72

%ATHR.L2CB% = L2CB2.DisS5.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_396517AA&REV_C0 ; LL7
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_396B17AA&REV_C0 ; NAWEx
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_397917AA&REV_C0 ; PIWG1/2/3
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_397B17AA&REV_C0 ; PAWGx
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_398317AA&REV_C0 ; PAW10/20

%ATHR.L2CB% = L2CB2.MB.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_81521019&REV_C0 ; ECS
%ATHR.L2CB% = L2CB2.MB.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_20621019&REV_C0 ; ECS

%ATHR.L2CB% = L2CB2.FUJU.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_15DB10CF&REV_C0 ; UME

%ATHR.L2CB% = L2CB2.DisS5.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_18501043&REV_C0 ; ASUS
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_84681043&REV_C0 ; ASUS

%ATHR.L2CB% = L2CB2.MB.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_E0001458&REV_C0 ; GIGABYT

%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_20621969&REV_C1 ; L2cb 2.1

%ATHR.L2CB% = L2CB2.ASPM1.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04861028&REV_C1 ; DJ2_CP
%ATHR.L2CB% = L2CB2.ASPM1.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04871028&REV_C1 ; DJ2_AMD
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04511028&REV_C1 ; DJ1_MV
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04551028&REV_C1 ; UM7
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04561028&REV_C1 ; UM8
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04571028&REV_C1 ; UM9
%ATHR.L2CB% = L2CB2.ASPM1.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04661028&REV_C1 ; DJ1_CP
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_046F1028&REV_C1 ; DJ1_AMD
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_048F1028&REV_C1 ; Dell_Avenger
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04901028&REV_C1 ; Dell_Voyager
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04A61028&REV_C1 ; DJ2_MV
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_049E1028&REV_C1 ; DJ2_AMD
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_049F1028&REV_C1 ; DJ2_CP_UMA
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04A01028&REV_C1 ; DJ2_CP_DIS
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04DF1028&REV_C1 ; Andros MLK
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04EA1028&REV_C1 ; Zuma
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_051B1028&REV_C1 ; Shakira
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_05501028&REV_C1 ; Avenger II
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_05511028&REV_C1 ; Voyager II
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_05521028&REV_C1 ; Spector II
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_057B1028&REV_C1 ; Voyager II
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_05801028&REV_C1 ; Voyager II

%ATHR.L2CB% = L2CB2.ShutOn.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FC761179&REV_C1 ; Ankara
%ATHR.L2CB% = L2CB2.ShutOn.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FC771179&REV_C1 ; Ankara
%ATHR.L2CB% = L2CB2.ShutOn.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FD7A1179&REV_C1 ; Ankara
%ATHR.L2CB% = L2CB2.ShutOn.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FD7B1179&REV_C1 ; Ankara
%ATHR.L2CB% = L2CB2.ShutOn.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FC671179&REV_C1 ; Celtic
%ATHR.L2CB% = L2CB2.ShutOn.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FD6A1179&REV_C1 ; Celtic
%ATHR.L2CB% = L2CB2.ShutOn.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FD6B1179&REV_C1 ; Celtic
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FD501179&REV_C1 ; TE2
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FDD01179&REV_C1 ; BL6
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FF1E1179&REV_C1 ; IEC
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FDD11179&REV_C1 ; TE7
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FFD61179&REV_C1 ; TZ6
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FCB31179&REV_C1 ; TE7
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FC501179&REV_C1 ; BLF
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FCD01179&REV_C1 ; TE5
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FCC01179&REV_C1 ; BU5
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FD521179&REV_C1 ; BLE
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FDD21179&REV_C1 ; BU4
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FD401179&REV_C1 ; BU4
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FC401179&REV_C1 ; BU6
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FB901179&REV_C1 ; BU8
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FB911179&REV_C1 ; BU8D
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FB921179&REV_C1 ; BU8D
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FCD31179&REV_C1 ; BY5/BY5D
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FB551179&REV_C1 ; BY6
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FB561179&REV_C1 ; BY6D
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FCD21179&REV_C1 ; BY3
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FCD41179&REV_C1 ; BY3D
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FCD51179&REV_C1 ; BY3D
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FC551179&REV_C1 ; BY4
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FC561179&REV_C1 ; BY4D
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FC571179&REV_C1 ; BY4D
%ATHR.L2CB% = L2CB2.FSWOL.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FB501179&REV_C1 ; BY3C
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FB511179&REV_C1 ; BY3G
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FB521179&REV_C1 ; BY3G
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FB801179&REV_C1 ; BY4C
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FB811179&REV_C1 ; BY4G
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FB821179&REV_C1 ; BY4G
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FCC51179&REV_C1 ; KZ1
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FC421179&REV_C1 ; BY1
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FBA01179&REV_C1 ; TEA
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FBA11179&REV_C1 ; BY2
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FBA21179&REV_C1 ; BY2D
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FAB31179&REV_C1 ; BY2D
%ATHR.L2CB% = L2CB2.PWMAll.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_FB731179&REV_C1 ; BYD

%ATHR.L2CB% = L2CB2.ShutOn.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_147E103C&REV_C1 ; Bixby 3.0
%ATHR.L2CB% = L2CB2.ShutOn.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_3584103C&REV_C1 ; Kitty
%ATHR.L2CB% = L2CB2.ShutOn.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_3585103C&REV_C1 ; Kitty
%ATHR.L2CB% = L2CB2.ShutOn.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_3595103C&REV_C1 ; KID
%ATHR.L2CB% = L2CB2.SYS.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_2AE3103C&REV_C1 ; RedwoodA
%ATHR.L2CB% = L2CB2.SYS.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_2AE4103C&REV_C1 ; RedwoodB

%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04291025&REV_C1 ; ZH9
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_043D1025&REV_C1 ; ZH9
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_043E1025&REV_C1 ; ZH9AB
%ATHR.L2CB% = L2CB2.ASPM1.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_03491025&REV_C1 ; NAV70
%ATHR.L2CB% = L2CB2.ASPM1.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_034A1025&REV_C1 ; NAV80
%ATHR.L2CB% = L2CB2.ASPM1.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04971025&REV_C1 ; PAV50
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_048A1025&REV_C1 ; PEW72
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_02291025&REV_C1 ; JM31
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_027F1025&REV_C1 ; JM31
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_02801025&REV_C1 ; JM31
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_03641025&REV_C1 ; JM31
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_040E1025&REV_C1 ; JV10
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04281025&REV_C1 ; SJV10
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04291025&REV_C1 ; JV10_NL
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_040D1025&REV_C1 ; SJV10_NL
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_04601025&REV_C1 ; SJV10_CP
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_045F1025&REV_C1 ; JV10_NL
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_05431025&REV_C1 ; P0VE6
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_05441025&REV_C1 ; P0VS6
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_05981025&REV_C1 ; P1VE6
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_06021025&REV_C1 ; HMA51-BZ
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_06031025&REV_C1 ; ZQJ
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_06041025&REV_C1 ; ZQQ
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_060A1025&REV_C1 ; SAZ70
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_060B1025&REV_C1 ; SIC70
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_060E1025&REV_C1 ; SAZ71
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_060F1025&REV_C1 ; SIC71
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_06101025&REV_C1 ; AIC70
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_06111025&REV_C1 ; AIC71
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_06141025&REV_C1 ; AAB70
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_06151025&REV_C1 ; AAB71
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_05041025&REV_C1 ;
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_061E1025&REV_C1 ; Q5WP1
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_06221025&REV_C1 ; HMA41
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_06231025&REV_C1 ; HMA51
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_063A1025&REV_C1 ; JE10-CT
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_07641025&REV_C1 ; V5VE1/T1

%ATHR.L2CB% = L2CB2.DisS5.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_396517AA&REV_C1 ; LL7
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_396B17AA&REV_C1 ; NAWEx
%ATHR.L2CB% = L2CB2.TxPerf.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_397917AA&REV_C1 ; PIWG1/2/3
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_397B17AA&REV_C1 ; PAWGx
%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_397717AA&REV_C1 ; Y490

%ATHR.L2CB% = L2CB2.MB.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_81521019&REV_C1 ; ECS
%ATHR.L2CB% = L2CB2.MB.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_20621019&REV_C1 ; ECS

%ATHR.L2CB% = L2CB2.FUJU.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_15DB10CF&REV_C1 ; UME

%ATHR.L2CB% = L2CB2.DisS5.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_18501043&REV_C1 ; ASUS
%ATHR.L2CB% = L2CB2.SYS.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_84681043&REV_C1 ; ASUS
%ATHR.L2CB% = L2CB2.SYS.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_100B1043&REV_C1 ; ASUS
%ATHR.L2CB% = L2CB2.SYS.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_103B1043&REV_C1 ; ASUS

%ATHR.L2CB% = L2CB2.SYS.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_20621849&REV_C1 ; Asrock

%ATHR.L2CB% = L2CB2.MB.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_E0001458&REV_C1 ; GIGABYTE

%ATHR.L2CB% = L2CB2.MB.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_28021565&REV_C1 ; BIOSTAR
%ATHR.L2CB% = L2CB2.MB.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_28011565&REV_C1 ; BIOSTAR

%ATHR.L2CB% = L2CB2.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_207E1B0A&REV_C1 ; Pegatron
%ATHR.L2CB% = L2CB2.SYS.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_2AAE103C&REV_C1 ; Pegatron
%ATHR.L2CB% = L2CB2.SYS.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_3580103C&REV_C1 ; Pegatron
%ATHR.L2CB% = L2CB2.SYS.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_2AD1103C&REV_C1 ; Pegatron
%ATHR.L2CB% = L2CB2.SYS.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_2AD3103C&REV_C1 ; Pegatron
%ATHR.L2CB% = L2CB2.SYS.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_2AD4103C&REV_C1 ; Pegatron
%ATHR.L2CB% = L2CB2.SYS.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_2AE2103C&REV_C1 ; Pegatron
%ATHR.L2CB% = L2CB2.SYS.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_2AF4103C&REV_C1 ; Pegatron

%ATHR.L2CB% = L2CB2.ShutOn.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_0E2D105B&REV_C1 ; Livebox
%ATHR.L2CB% = L2CB2.GIGABYTE.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_0D83105B&REV_C1 ; Foxconn
%ATHR.L2CB% = L2CB2.SYS.ndi, PCI\VEN_1969&DEV_2062&SUBSYS_2B01103C&REV_C1 ; Foxconn/Redwood2

%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083 ; L1d 2.0
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_10831969&REV_C0 ;

%ATHR.L1D% = L1D2.DisS5.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_18401043&REV_C0 ; ASUS
%ATHR.L1D% = L1D2.DisS5.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_18511043&REV_C0 ; ASUS
%ATHR.L1D% = L1D2.SYS.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_847E1043&REV_C0 ; ASUS
%ATHR.L1D% = L1D2.SYS.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_84BF1043&REV_C0 ; ASUS
%ATHR.L1CD% = L1D2.SYS.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_83FE1043&REV_C0 ; ASUS

%ATHR.L1D% = L1D2.MB.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_E0001458&REV_C0 ; GIGABYTE

%ATHR.L1D% = L1D2.MB.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_81511019&REV_C0 ; ECS
%ATHR.L1D% = L1D2.MB.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_10831019&REV_C0 ; ECS

%ATHR.L1D% = L1D2.MB.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_76801462&REV_C0 ; MSI

%ATHR.L1D% = L1D2.MB.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_10831849&REV_C0 ; Asrock

%ATHR.L1D% = L1D2.SYS.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_2AAE103C&REV_C0 ; Pegatron
%ATHR.L1D% = L1D2.SYS.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_3580103C&REV_C0 ; Pegatron
%ATHR.L1D% = L1D2.SYS.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_2B01103C&REV_C0 ; Pegatron
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_109C1462&REV_C0 ; Pegatron
%ATHR.L1D% = L1D2.ShutOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_208D1B0A&REV_C0 ; Pegatron
%ATHR.L1D% = L1D2.SYSShutOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_2AD5103C&REV_C0 ; Pegatron

%ATHR.L1D% = L1D2.ShutOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_3584103C&REV_C0 ; Kitty
%ATHR.L1D% = L1D2.ShutOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_3585103C&REV_C0 ; Kitty
%ATHR.L1D% = L1D2.ShutOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_3385103C&REV_C0 ; UMA
%ATHR.L1D% = L1D2.ShutOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_3386103C&REV_C0 ; DIS
%ATHR.L1D% = L1D2.ShutOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_1688103C&REV_C0 ; Lauren
%ATHR.L1D% = L1D2.ShutOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_1689103C&REV_C0 ; Vuitton
%ATHR.L1D% = L1D2.ShutOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_168A103C&REV_C0 ; Vuitton

%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04631025&REV_C0 ; ZR7D
%ATHR.L1D% = L1D2.TxPerf.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_047E1025&REV_C0 ; PAU30
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_048A1025&REV_C0 ; PEW72
%ATHR.L1D% = L1D2.TxPerf.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_050E1025&REV_C0 ; P7YE0
%ATHR.L1D% = L1D2.TxPerf.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_050F1025&REV_C0 ; P7YE0
%ATHR.L1D% = L1D2.TxPerf.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05131025&REV_C0 ; P7YS0
%ATHR.L1D% = L1D2.TxPerf.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05141025&REV_C0 ; P7YS0
%ATHR.L1D% = L1D2.TxPerf.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05151025&REV_C0 ; P7YH0
%ATHR.L1D% = L1D2.TxPerf.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05161025&REV_C0 ; P7YH0
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_054C1025&REV_C0 ; JM30
%ATHR.L1D% = L1D2.TxPerf.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_054E1025&REV_C0 ; JM30
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_02291025&REV_C0 ; JM31
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_027F1025&REV_C0 ; JM31
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_02801025&REV_C0 ; JM31
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_03641025&REV_C0 ; JM31
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_040E1025&REV_C0 ; JV10
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04281025&REV_C0 ; SJV10
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04291025&REV_C0 ; JV10_NL
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_040D1025&REV_C0 ; SJV10_NL
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04601025&REV_C0 ; SJV10_CP
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_045F1025&REV_C0 ; JV10_NL
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_03561025&REV_C0 ; ZQ1
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_03571025&REV_C0 ; ZQ1
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_03581025&REV_C0 ; ZQ1B
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_03591025&REV_C0 ; ZQ1B
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_035A1025&REV_C0 ; ZR7
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_035B1025&REV_C0 ; ZR7
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_035C1025&REV_C0 ; ZR7B
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_035D1025&REV_C0 ; ZR7B
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_035E1025&REV_C0 ; ZQ2
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_03601025&REV_C0 ; ZR8
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_03621025&REV_C0 ; ZR8B
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_03661025&REV_C0 ; ZQ2B
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_03641025&REV_C0 ; JM31
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_03671025&REV_C0 ; ZYA
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_03681025&REV_C0 ; ZYA
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_038B1025&REV_C0 ; ZYB
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_038C1025&REV_C0 ; ZYB
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04121025&REV_C0 ; ZYD
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_040E1025&REV_C0 ; JV10
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04281025&REV_C0 ; SJV10
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04291025&REV_C0 ; JV10_NL
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_040D1025&REV_C0 ; SJV10_NL
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04601025&REV_C0 ; JV10_CP
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_045F1025&REV_C0 ; JV10_NL
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04631025&REV_C0 ; ZR7D
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04641025&REV_C0 ; JV53_CP
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04651025&REV_C0 ; JV53_CP
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04731025&REV_C0 ; SJM70_CP
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04751025&REV_C0 ; SJM70_CP
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04761025&REV_C0 ; SJM70_CP
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_048A1025&REV_C0 ; PEW72
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_051E1025&REV_C0 ; SJV73
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_051F1025&REV_C0 ; SJV73
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05201025&REV_C0 ; JE73
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05211025&REV_C0 ; JE73
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05221025&REV_C0 ; JE73
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05231025&REV_C0 ; JE73
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05241025&REV_C0 ; SJ53
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_052A1025&REV_C0 ; SJ53
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_052D1025&REV_C0 ; ZQE
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_052E1025&REV_C0 ; ZQE
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_052F1025&REV_C0 ; ZQG
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05301025&REV_C0 ; ZQG
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05571025&REV_C0 ; JE41
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_055F1025&REV_C0 ; JE51
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_054B1025&REV_C0 ; HM51
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_054D1025&REV_C0 ; HM51
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_054F1025&REV_C0 ; JM40
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_055B1025&REV_C0 ; JM50
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05711025&REV_C0 ; SJM40
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_056D1025&REV_C0 ; BA70
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_056F1025&REV_C0 ; SJM50
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05731025&REV_C0 ; ZRJ
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05741025&REV_C0 ; SJM40
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_058D1025&REV_C0 ; SJV51
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_058E1025&REV_C0 ; SJV51
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_059C1025&REV_C0 ; JE70
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_059D1025&REV_C0 ; SJV70
%ATHR.L1D% = L1D2.PEGA.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05391025&REV_C0 ; EIH30
%ATHR.L1D% = L1D2.PEGA.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_053A1025&REV_C0 ; EIH31
%ATHR.L1D% = L1D2.PEGA.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_060C1025&REV_C0 ; EIH30A
%ATHR.L1D% = L1D2.PEGA.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_060D1025&REV_C0 ; EIH31A
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_064E1025&REV_C0 ; Q7YV0
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_064D1025&REV_C0 ; Q7YV0
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_064F1025&REV_C0 ; Q7YS0
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_06501025&REV_C0 ; Q7YS0
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_06511025&REV_C0 ; Q7YV1
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_06521025&REV_C0 ; Q7YV1
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_06531025&REV_C0 ; Q7YS1
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_06541025&REV_C0 ; Q7YS1
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_06631025&REV_C0 ; Q5WP3
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_06741025&REV_C0 ; Q7YC1
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_06761025&REV_C0 ; Q7YC1
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_06851025&REV_C0 ; VA70CR
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_06861025&REV_C0 ; VA70CR
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_06881025&REV_C0 ; VA70CR
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_06891025&REV_C0 ; VA70CR
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_068A1025&REV_C0 ; VA70HR
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_068B1025&REV_C0 ; VA70HR
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_068C1025&REV_C0 ; VA70HR
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_068D1025&REV_C0 ; VA70HR
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_06961025&REV_C0 ; VA50_CM
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_06981025&REV_C0 ; VG50_CM
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_06901025&REV_C0 ; Q5WT6
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05761025&REV_C0 ; BA50
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_07151025&REV_C0 ; ZQZ
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_07221025&REV_C0 ; BA50HC(CR)
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_07231025&REV_C0 ; BA50HC(HR)
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_073D1025&REV_C0 ; EG70_BZ
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_073E1025&REV_C0 ; EG70_BZ_PX
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_07561025&REV_C0 ; ZRP
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_07571025&REV_C0 ; ZRP

%ATHR.L1D% = L1D2.WOLNone.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_048F1028&REV_C0 ; Dell_Avenger
%ATHR.L1D% = L1D2.WOLNone.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04901028&REV_C0 ; Dell_Voyager
%ATHR.L1D% = L1D2.WOLNone.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04911028&REV_C0 ; Spector
%ATHR.L1D% = L1D2.WOLNone.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04C81028&REV_C0 ; Alienware
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04A61028&REV_C0 ; DJ2_MV
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_049E1028&REV_C0 ; DJ2_AMD
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_049F1028&REV_C0 ; DJ2_CP_UMA
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04A01028&REV_C0 ; DJ2_CP_DIS
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04371028&REV_C0 ; Miso
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04461028&REV_C0 ; Panerai
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_04841028&REV_C0 ; UMA
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_051F1028&REV_C0 ; UMA1
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05201028&REV_C0 ; UMA2
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05211028&REV_C0 ; UMA3
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05221028&REV_C0 ; Discrete1
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05231028&REV_C0 ; Discrete2
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05241028&REV_C0 ; Discrete3
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05481028&REV_C0 ; Olympic
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_054B1028&REV_C0 ; Princeville
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05501028&REV_C0 ; Avenger II
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05511028&REV_C0 ; Voyager II
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05521028&REV_C0 ; Spector II
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_057B1028&REV_C0 ; Voyager II
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_05801028&REV_C0 ; Voyager II

%ATHR.L1D% = L1D2.TxPerf.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_397917AA&REV_C0 ; PIWG1/2/3
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_397B17AA&REV_C0 ; PAWGx
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_398317AA&REV_C0 ; PAW10/20
%ATHR.L1D% = L1D2.LVOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_21EC17AA&REV_C0 ; Davis
%ATHR.L1D% = L1D2.LVOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_21ED17AA&REV_C0 ; Davis
%ATHR.L1D% = L1D2.LVOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_21EE17AA&REV_C0 ; Payton
%ATHR.L1D% = L1D2.LVOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_21EF17AA&REV_C0 ; Payton
%ATHR.L1D% = L1D2.LVOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_21F017AA&REV_C0 ; Payton
%ATHR.L1D% = L1D2.LVOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_21F117AA&REV_C0 ; Payton
%ATHR.L1D% = L1D2.LVOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_21F217AA&REV_C0 ; Payton
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_397717AA&REV_C0 ; Y490

%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_08611854&REV_C0 ; QLH
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_08621854&REV_C0 ; QLH
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_08631854&REV_C0 ; QLH
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_08641854&REV_C0 ; QLH
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_08651854&REV_C0 ; QLH
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_08661854&REV_C0 ; QLA
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_08671854&REV_C0 ; QLA
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_08681854&REV_C0 ; QLA
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_08691854&REV_C0 ; QLC
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_08701854&REV_C0 ; QLC
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_08711854&REV_C0 ; QLC
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_08891854&REV_C0 ; QLM
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_08901854&REV_C0 ; QLM
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_08911854&REV_C0 ; QLM
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_08921854&REV_C0 ; QLM
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_08961854&REV_C0 ; LG2
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_08971854&REV_C0 ; LG2
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_08981854&REV_C0 ; LG2
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_08991854&REV_C0 ; LG4
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_09001854&REV_C0 ; LG4
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_09011854&REV_C0 ; LG4
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_09021854&REV_C0 ; LG7
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_09031854&REV_C0 ; LG7
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_09041854&REV_C0 ; LG7
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_09061854&REV_C0 ; A430
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_09071854&REV_C0 ; A430
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_09081854&REV_C0 ; A430
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_17911854&REV_C0 ; A420
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_17921854&REV_C0 ; A430
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_17931854&REV_C0 ; A430
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_17981854&REV_C0 ; LG2B
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_17991854&REV_C0 ; LG2B
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_18001854&REV_C0 ; LG2B
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_18011854&REV_C0 ; LG4B
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_18021854&REV_C0 ; LG4B
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_18031854&REV_C0 ; LG4B
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_18041854&REV_C0 ; LG2B
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_18051854&REV_C0 ; LG2B
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_18061854&REV_C0 ; LG4B
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_18071854&REV_C0 ; LG4B

%ATHR.L1D% = L1D2.ShutOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_1650103C&REV_C0 ; Zidane UMA
%ATHR.L1D% = L1D2.ShutOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_1651103C&REV_C0 ; Zidane SG
%ATHR.L1D% = L1D2.ShutOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_3595103C&REV_C0 ; KID
%ATHR.L1D% = L1D2.ShutOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_3596103C&REV_C0 ; KID
%ATHR.L1D% = L1D2.ShutOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_1851103C&REV_C0 ; Inventec / HP
%ATHR.L1D% = L1D2.ShutOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_1852103C&REV_C0 ; Inventec / HP
%ATHR.L1D% = L1D2.ShutOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_1853103C&REV_C0 ; Inventec / HP

%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FDD11179&REV_C0 ; TE7
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FFD61179&REV_C0 ; TZ6
%ATHR.L1D% = L1D2.TOSHIBA.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FF1E1179&REV_C0 ; WS2
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FCB01179&REV_C0 ; TZ6
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FC501179&REV_C0 ; BLF
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FCD01179&REV_C0 ; TE5
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FCC01179&REV_C0 ; BU5
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FD521179&REV_C0 ; BLE
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FDD21179&REV_C0 ; BU4
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FD401179&REV_C0 ; BU4
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FDD01179&REV_C0 ; TE4
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FD501179&REV_C0 ; BLG
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FB901179&REV_C0 ; BU8
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FB911179&REV_C0 ; BU8D
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FB921179&REV_C0 ; BU8D
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FCD31179&REV_C0 ; BY5/BY5D
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FB551179&REV_C0 ; BY6
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FB561179&REV_C0 ; BY6D
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FCD21179&REV_C0 ; BY3
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FCD41179&REV_C0 ; BY3D
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FCD51179&REV_C0 ; BY3D
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FC551179&REV_C0 ; BY4
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FC561179&REV_C0 ; BY4D
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FC571179&REV_C0 ; BY4D
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FB501179&REV_C0 ; BY3C
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FB511179&REV_C0 ; BY3G
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FB521179&REV_C0 ; BY3G
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FB801179&REV_C0 ; BY4C
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FB811179&REV_C0 ; BY4G
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FB821179&REV_C0 ; BY4G
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FCC51179&REV_C0 ; KZ1
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FC421179&REV_C0 ; BY1
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FAB31179&REV_C0 ; BY2D
%ATHR.L1D% = L1D2.PWMAll.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FB721179&REV_C0 ; BYD
%ATHR.L1D% = L1D2.ShutOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_FC661179&REV_C0 ; Celtic

%ATHR.L1D% = L1D2.SONY.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_9080104D&REV_C0 ; V050
%ATHR.L1D% = L1D2.SONY.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_9081104D&REV_C0 ; V050
%ATHR.L1D% = L1D2.WOLNone.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_908A104D&REV_C0 ; Z40/50
%ATHR.L1D% = L1D2.SONY.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_908D104D&REV_C0 ; Z40/50BR

%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_0872152D&REV_C0 ; LG
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_0873152D&REV_C0
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_0875152D&REV_C0
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_0876152D&REV_C0
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_0877152D&REV_C0
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_0878152D&REV_C0
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_0883152D&REV_C0 ; SW6H
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_0884152D&REV_C0 ; SW6H
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_0880152D&REV_C0 ; SWH
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_0913152D&REV_C0 ; JW1
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_0914152D&REV_C0 ; JW1
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_0915152D&REV_C0 ; JW1
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_0916152D&REV_C0 ; JW1
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_0917152D&REV_C0 ; JW1
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_0952152D&REV_C0 ; TWC
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_0953152D&REV_C0 ; SWH
%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_0988152D&REV_C0 ; JW8

%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_10E717C0&REV_C0 ; M51

%ATHR.L1D% = L1D2.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_0DBE105B&REV_C0 ; Clone
%ATHR.L1D% = L1D2.ShutOn.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_0E2D105B&REV_C0 ; Livebox
%ATHR.L1D% = L1D2.ECS.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_0D83105B&REV_C0 ; Foxconn

%ATHR.L1D% = L1D2.MB.ndi, PCI\VEN_1969&DEV_1083&SUBSYS_28031565&REV_C0 ; BIOSTAR

%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091 ; L1F

%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_85071043 ; ASUS
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_200F1043 ; ASUS

%ATHR.L1F% = L1F.MB.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_81611019 ; ECS

%ATHR.L1F% = L1F.MB.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_E0001458 ; GIGABYTE

%ATHR.L1F% = L1F.MB.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_10911849 ; Asrock

%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_AA5D1462 ; MSI

%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_2AD5103C ; Pegatron
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_2AE0103C ;

%ATHR.L1F% = L1F.ShutOn.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_05001025 ; JE40-CR
%ATHR.L1F% = L1F.ShutOn.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_06431025 ; JV42-HR

%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_397917AA ; Lenovo
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_397817AA ;
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_397C17AA ;
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_397717AA ; Y490

%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_05481028 ; Olympic
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_054B1028 ; Princeville
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_055B1028 ; M13
%ATHR.L1F% = L1F.ShutOn.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_055C1028 ; M13
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_055D1028 ; M13
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_055E1028 ; M13
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_055F1028 ; M13
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_05601028 ; M13
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_05611028 ; M13
%ATHR.L1F% = L1F.ShutOn.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_05621028 ; M13
%ATHR.L1F% = L1F.ShutOn.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_05631028 ; M13
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_05641028 ; M13
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_05651028 ; M13
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_05661028 ; M13
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_05671028 ; M13
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_05681028 ; M13
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_057E1028 ; DMB40
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_057F1028 ; DMB40
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_058F1028 ; Z5_UMA
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_05901028 ; Z5_Discrete
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_05D91028 ; Titan
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_05DA1028 ; Titan
%ATHR.L1F% = L1F.ShutOn.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_05E71028 ; Titan
%ATHR.L1F% = L1F.ShutOn.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_05E81028 ; Titan

%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_17951854 ; QLC
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_17961854 ; QLC
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_17971854 ; QLC
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18081854 ; QLGA
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18091854 ; LG3
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18101854 ; LG3
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18111854 ; LG3
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18121854 ; LG5
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18131854 ; LG5
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18141854 ; LG5
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18151854 ; LG2C
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18161854 ; LG2C
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18171854 ; LG2C
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18181854 ; LG4C
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18191854 ; LG4C
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18201854 ; LG4C
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18211854 ; LG2C
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18221854 ; LG2C
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18231854 ; LG2C
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18241854 ; LG4C
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18251854 ; LG4C
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18261854 ; LG4C
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18271854 ; LG2C
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18281854 ; LG4C

%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_20D61B0A ; Pegatron
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_20FA1B0A ; Pegatron
%ATHR.L1F% = L1F.PEGA.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_01501B0A ; Pegatron
%ATHR.L1F% = L1F.PEGA.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_01571B0A ; Pegatron

%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FF1E1179 ; Toshiba
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA501179 ; MTC
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA511179 ; MTCD
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA521179 ; MTK
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA531179 ; MTKD
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA541179 ; MTB
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA551179 ; MTBD
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA561179 ; MTBN
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA571179 ; MTBND
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA581179 ; MTCD
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA591179 ; MTKD
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA701179 ; BDA
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA711179 ; BDAD
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA721179 ; BDB
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA731179 ; BDBD
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA741179 ; BDC
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA751179 ; BDD
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA761179 ; BDC
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA771179 ; BDD
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA781179 ; BDAD
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA791179 ; BDBD
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA801179 ; BD5
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA811179 ; BD5D
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA821179 ; BD6
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA831179 ; BD6D
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA851179 ; BD8
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA861179 ; BD8D
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA871179 ; BD9
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA881179 ; BD5D
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FA891179 ; BD6D
%ATHR.L1F% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_FBA11179 ; BY2E

%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0925152D ; JW2
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0926152D ; JW2
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0927152D ; JW2
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0928152D ; JW2
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0929152D ; JW2
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0932152D ; TWC
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0933152D ; TWC
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0934152D ; TWC
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0935152D ; TWC
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0936152D ; TWC
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0938152D ; JW2
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0939152D ; JW2
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0940152D ; JW2
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0941152D ; TWC
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0942152D ; TWC
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0943152D ; TWC
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0944152D ; TWC
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0945152D ; JW2
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0946152D ; JW2
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0947152D ; JW2
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0948152D ; TWC
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0949152D ; TWC
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0950152D ; TWC
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0951152D ; TWC
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0954152D ; JW6
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0955152D ; JW6
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0956152D ; JW6
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0957152D ; JW6
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0958152D ; JW6
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0959152D ; JW7
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0960152D ; JW7
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0961152D ; JW3
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0962152D ; JW3
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0963152D ; JW3
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0964152D ; JW3
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0965152D ; JW3
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0966152D ; JW3
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0967152D ; JW3
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0968152D ; JW6
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0969152D ; JW6
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0970152D ; JW6
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0971152D ; JW6
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0972152D ; JW6
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0973152D ; JW6
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0974152D ; JW3
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0975152D ; JW3
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0976152D ; JW3
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0977152D ; JW3
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0982152D ; JW8
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0983152D ; JW8
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0984152D ; JW8
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0989152D ; TWD
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0990152D ; TWD
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0991152D ; TWD
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0992152D ; TWD
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0993152D ; TWD
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0994152D ; TWD
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0995152D ; TWD
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_0997152D ; JW6
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_1001152D ; TWC
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_1006152D ; JW6H
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_1015152D ; JW3
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_1022152D ; JW3H
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_1030152D ; JW9
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_1031152D ; JW9
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_1012152D ; JW6H
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_1013152D ; JW6H
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_1055152D ; JW3H
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_1056152D ; JW3H
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_1054152D ; TWD

%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18291854 ; JW6L
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18301854 ; JW6L
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18311854 ; JW6L
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18321854 ; JW6L
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18331854 ; LG3B
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18341854 ; LG5B
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18351854 ; LG3B
%ATHR.L1F% = L1F.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_18361854 ; LG5B

%ATHR.L1F% = L1F.MB.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_00911969 ; iCafe

%ATHR.L1F% = L1F.NEC.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_603317AA ; NEC

%ATHR.L1F% = L1F.ShutOn.ndi, PCI\VEN_1969&DEV_1091&SUBSYS_A2101B72 ; M530

%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090 ; L2F

%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_200F1043 ; ASUS

%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_10901849 ; Asrock

%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_397917AA ; Lenovo
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_397817AA ;
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_397C17AA ;
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_397717AA ; Y490
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_380117AA ; VIWGQ
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_380217AA ; VIWGP
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_380417AA ; VILG1/2
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_380517AA ; VAWGA/B
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_380617AA ; VAGLC/D

%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_055B1028 ; M13
%ATHR.L2F% = L2F.ShutOn.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_055C1028 ; M13
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_055D1028 ; M13
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_055E1028 ; M13
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_055F1028 ; M13
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_05601028 ; M13
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_05611028 ; M13
%ATHR.L2F% = L2F.ShutOn.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_05621028 ; M13
%ATHR.L2F% = L2F.ShutOn.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_05631028 ; M13
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_05641028 ; M13
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_05651028 ; M13
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_05661028 ; M13
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_05671028 ; M13
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_05681028 ; M13
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_058F1028 ; Z5_UMA
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_05901028 ; Z5_Discrete
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_05D91028 ; Titan
%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_05DA1028 ; Titan

%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FF1E1179 ; Toshiba
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA501179 ; MTC
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA511179 ; MTCD
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA521179 ; MTK
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA531179 ; MTKD
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA541179 ; MTB
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA551179 ; MTBD
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA561179 ; MTBN
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA571179 ; MTBND
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA581179 ; MTCD
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA591179 ; MTKD
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA701179 ; BDA
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA711179 ; BDAD
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA721179 ; BDB
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA731179 ; BDBD
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA741179 ; BDC
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA751179 ; BDD
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA761179 ; BDC
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA771179 ; BDD
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA781179 ; BDAD
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA791179 ; BDBD
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA801179 ; BD5
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA811179 ; BD5D
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA821179 ; BD6
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA831179 ; BD6D
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA851179 ; BD8
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA861179 ; BD8D
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA871179 ; BD9
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA881179 ; BD5D
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FA891179 ; BD6D
%ATHR.L2F% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_FBA11179 ; BY2F

%ATHR.L2F% = L2F.ndi, PCI\VEN_1969&DEV_1090&SUBSYS_20FB1B0A ; Pegatron

%ATHR.L1H% = L1F.ndi, PCI\VEN_1969&DEV_10A1 ; L1H

%ATHR.L1H% = L1F.MB.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_200F1043 ; ASUS
%ATHR.L1H% = L1F.MB.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_85871043 ; ASUS

%ATHR.L1H% = L1F.MB.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_00A11969 ; iCafe

%ATHR.L1H% = L1F.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_380017AA ; VIQY0/Y1

%ATHR.L1H% = L1F.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_07671025 ; EA40_UMA
%ATHR.L1H% = L1F.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_07681025 ; EA40_KB
%ATHR.L1H% = L1F.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_076B1025 ; EA50_UMA
%ATHR.L1H% = L1F.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_076C1025 ; EA50_PowerXpress
%ATHR.L1H% = L1F.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_076F1025 ; EG50_UMA
%ATHR.L1H% = L1F.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_07701025 ; EG50_PowerXpress
%ATHR.L1H% = L1F.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_07781025 ; VP40_UMA
%ATHR.L1H% = L1F.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_07791025 ; VP40_PowerXpress
%ATHR.L1H% = L1F.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_07951025 ; ZHN
%ATHR.L1H% = L1F.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_07961025 ; ZHL
%ATHR.L1H% = L1F.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_08101025 ; ZQI
%ATHR.L1H% = L1F.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_08111025 ; ZQI
%ATHR.L1H% = L1F.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_080E1025 ; ZRI
%ATHR.L1H% = L1F.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_080F1025 ; ZRI

%ATHR.L1H% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_FA721179 ; BDB
%ATHR.L1H% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_FA731179 ; BDBD
%ATHR.L1H% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_FA791179 ; BDBD
%ATHR.L1H% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_FA771179 ; BDD
%ATHR.L1H% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_FA751179 ; BDD
%ATHR.L1H% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_FA301179 ; Toshiba
%ATHR.L1H% = L1F.PWMALL.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_FA401179 ; Toshiba
%ATHR.L1H% = L1F.PWMALLLTR.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_FA311179 ; Toshiba
%ATHR.L1H% = L1F.PWMALLLTR.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_FA411179 ; Toshiba
%ATHR.L1H% = L1F.PWMALLLTR.ndi, PCI\VEN_1969&DEV_10A1&SUBSYS_FF1E1179 ; UMA/DIS

%ATHR.L2H% = L2F.ndi, PCI\VEN_1969&DEV_10A0 ; L2H

%ATHR.L2H% = L2F.ndi, PCI\VEN_1969&DEV_10A0&SUBSYS_200F1043 ; ASUS

%ATHR.L2H% = L2F.ndi, PCI\VEN_1969&DEV_10A0&SUBSYS_380017AA ; VIQY0/Y1
%ATHR.L2H% = L2F.ndi, PCI\VEN_1969&DEV_10A0&SUBSYS_380117AA ; VIWGQ
%ATHR.L2H% = L2F.ndi, PCI\VEN_1969&DEV_10A0&SUBSYS_380217AA ; VIWGP
%ATHR.L2H% = L2F.ndi, PCI\VEN_1969&DEV_10A0&SUBSYS_380417AA ; VILG1/2
%ATHR.L2H% = L2F.ndi, PCI\VEN_1969&DEV_10A0&SUBSYS_380517AA ; VAWGA/B
%ATHR.L2H% = L2F.ndi, PCI\VEN_1969&DEV_10A0&SUBSYS_380617AA ; VAGLC/D

%ATHR.L2H% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_10A0&SUBSYS_FA721179 ; BDB
%ATHR.L2H% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_10A0&SUBSYS_FA731179 ; BDBD
%ATHR.L2H% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_10A0&SUBSYS_FA791179 ; BDBD
%ATHR.L2H% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_10A0&SUBSYS_FA771179 ; BDD
%ATHR.L2H% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_10A0&SUBSYS_FA751179 ; BDD
%ATHR.L2H% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_10A0&SUBSYS_FA301179 ; Toshiba
%ATHR.L2H% = L2F.PWMALL.ndi, PCI\VEN_1969&DEV_10A0&SUBSYS_FA401179 ; Toshiba
%ATHR.L2H% = L2F.PWMALLLTR.ndi, PCI\VEN_1969&DEV_10A0&SUBSYS_FA311179 ; Toshiba
%ATHR.L2H% = L2F.PWMALLLTR.ndi, PCI\VEN_1969&DEV_10A0&SUBSYS_FA411179 ; Toshiba
%ATHR.L2H% = L2F.PWMALLLTR.ndi, PCI\VEN_1969&DEV_10A0&SUBSYS_FF1E1179 ; CR10ST/G

[L1C.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOff.params, WOLDefault.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1C.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L1C.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1C.ShutOn.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOn.params, WOLDefault.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1C.ShutOn.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L1C.ShutOn.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1C.DisS5.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, WOLDefault.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1C.DisS5.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L1C.DisS5.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1C.Toshiba.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOn.params, Toshiba.params, WOLDefault.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1C.Toshiba.ndi.HW]
Include = machine.inf
Needs = PciASPMOptIn
Addreg = Msi.Addreg

[L1C.Toshiba.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1C.Lenovo.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOff.params, WOLDefault.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1C.Lenovo.ndi.HW]
Include = machine.inf
Needs = PciASPMOptIn
Addreg = Msi.Addreg

[L1C.Lenovo.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1C.GIGABYTE.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOn.params, WOLMagic.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1C.GIGABYTE.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L1C.GIGABYTE.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1C.SONY.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOff.params, WOLNone.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1C.SONY.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L1C.SONY.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1C.WOLMagic.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOff.params, WOLMagic.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1C.WOLMagic.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L1C.WOLMagic.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog
;-----------------------------------------------------------------------------

[L2C.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, Common.params, ShutOff.params, WOLDefault.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2C.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L2C.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2C.ShutOn.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, Common.params, ShutOn.params, WOLDefault.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2C.ShutOn.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L2C.ShutOn.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2C.DisS5.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, Common.params, WOLDefault.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2C.DisS5.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L2C.DisS5.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2C.Toshiba.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, Common.params, ShutOn.params, Toshiba.params, WOLDefault.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2C.Toshiba.ndi.HW]
Include = machine.inf
Needs = PciASPMOptIn
Addreg = Msi.Addreg

[L2C.Toshiba.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2C.Lenovo.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, Common.params, ShutOff.params, WOLDefault.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2C.Lenovo.ndi.HW]
Include = machine.inf
Needs = PciASPMOptIn
Addreg = Msi.Addreg

[L2C.Lenovo.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2C.GIGABYTE.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, Common.params, ShutOn.params, WOLMagic.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2C.GIGABYTE.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L2C.GIGABYTE.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2C.WOLMagic.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, Common.params, ShutOff.params, WOLMagic.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2C.WOLMagic.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L2C.WOLMagic.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2CB.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L2CB.params, Common.params, ShutOff.params, WOLDefault.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2CB.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L2CB.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2CB.ShutOn.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L2CB.params, Common.params, ShutOn.params, WOLDefault.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2CB.ShutOn.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L2CB.ShutOn.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2CB.PWMAll.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L2CB.params, Common.params, ShutOn.params, WOLDefault.params, PWMAll.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2CB.PWMAll.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L2CB.PWMAll.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2CB.DisS5.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L2CB.params, Common.params, WOLDefault.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2CB.DisS5.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L2CB.DisS5.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2CB.MB.ndi]
Characteristics = 0x84
BusType = 5
DelReg = Del.reg, EEELPI.Delreg ;PCI
AddReg = L1C.reg, L2CB.params, MBCommon.params, ShutOn.params, WOLMagic.params, MSIIcafeLinkPatch.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2CB.MB.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L2CB.MB.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2CB.FUJU.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L2CB.params, FUJU.params, ShutOff.params, WOLDefault.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2CB.FUJU.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L2CB.FUJU.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2CB.ASPM1.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L2CB.params, Common.params, ShutOff.params, WOLDefault.params, ASPM1M.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2CB.ASPM1.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L2CB.ASPM1.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2CB2.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, Common.params, ShutOff.params, WOLDefault.params, EEELPI.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2CB2.ndi.HW]
Include = machine.inf
Needs = PciASPMOptIn
Addreg = Msi.Addreg

[L2CB2.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2CB2.SYS.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, Common.params, ShutOff.params, WOLDefault.params, EEELPI.params, SysLogoPatch.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2CB2.SYS.ndi.HW]
Include = machine.inf
Needs = PciASPMOptIn
Addreg = Msi.Addreg

[L2CB2.SYS.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2CB2.TxPerf.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, Common.params, ShutOff.params, WOLDefault.params, EEELPI.params, TxPerf.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2CB2.TxPerf.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L2CB2.TxPerf.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2CB2.ShutOn.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, Common.params, ShutOn.params, WOLDefault.params, EEELPI.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2CB2.ShutOn.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L2CB2.ShutOn.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2CB2.DisS5.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, Common.params, WOLDefault.params, EEELPI.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2CB2.DisS5.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L2CB2.DisS5.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2CB2.GIGABYTE.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, Common.params, ShutOn.params, WOLMagic.params, EEELPI.params, SysLogoPatch.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2CB2.GIGABYTE.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L2CB2.GIGABYTE.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2CB2.MB.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, MBCommon.params, ShutOn.params, WOLMagic.params, EEELPI.params, MSIIcafeLinkPatch.params, SysLogoPatch.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2CB2.MB.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L2CB2.MB.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2CB2.PWMAll.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, Common.params, ShutOn.params, WOLDefault.params, PWMAll.params, EEELPI.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2CB2.PWMAll.ndi.HW]
Include = machine.inf
Needs = PciASPMOptIn
Addreg = Msi.Addreg

[L2CB2.PWMAll.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2CB2.FSWOL.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, Common.params, ShutOn.params, WOLDefault.params, PWMAll.params, EEELPI.params, FSWOL.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2CB2.FSWOL.ndi.HW]
Include = machine.inf
Needs = PciASPMOptIn
Addreg = Msi.Addreg

[L2CB2.FSWOL.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2CB2.FUJU.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, FUJU.params, ShutOff.params, WOLDefault.params, EEELPI.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2CB2.FUJU.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L2CB2.FUJU.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2CB2.ASPM1.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, Common.params, ShutOff.params, WOLDefault.params, ASPM1M.params, EEELPI.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2CB2.ASPM1.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L2CB2.ASPM1.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1D.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOff.params, WOLDefault.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1D.ndi.HW]
Include = machine.inf
Needs = PciASPMOptIn
Addreg = Msi.Addreg

[L1D.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1D.TxPerf.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOff.params, WOLDefault.params, TxPerf.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1D.TxPerf.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L1D.TxPerf.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1D.ShutOn.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOn.params, WOLDefault.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1D.ShutOn.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L1D.ShutOn.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1D.ToPatch.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOn.params, WOLDefault.params, PWMAll.params, ToPatch.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1D.ToPatch.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L1D.ToPatch.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1D.DisS5.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, WOLDefault.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1D.DisS5.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L1D.DisS5.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1D.MB.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, MB.params, ShutOn.params, WOLMagic.params, LongCable.params, ExRSS.params, MSIIcafeLinkPatch.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1D.MB.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L1D.MB.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1D.ECSD.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, ECS.params, ShutOn.params, WOLMagic.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1D.ECSD.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L1D.ECSD.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1D2.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOff.params, WOLDefault.params, EEELPI.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1D2.ndi.HW]
Include = machine.inf
Needs = PciASPMOptIn
Addreg = Msi.Addreg

[L1D2.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1D2.SYS.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOff.params, WOLDefault.params, EEELPI.params, ExRSS.params, SysLogoPatch.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1D2.SYS.ndi.HW]
Include = machine.inf
Needs = PciASPMOptIn
Addreg = Msi.Addreg

[L1D2.SYS.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1D2.SYSShutOn.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOn.params, WOLDefault.params, EEELPI.params, TxPerf.params, ExRSS.params, SysLogoPatch.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1D2.SYSShutOn.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L1D2.SYSShutOn.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1D2.WOLNone.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOff.params, WOLNone.params, EEELPI.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1D2.WOLNone.ndi.HW]
Include = machine.inf
Needs = PciASPMOptIn
Addreg = Msi.Addreg

[L1D2.WOLNone.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1D2.TxPerf.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOff.params, WOLDefault.params, EEELPI.params, TxPerf.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1D2.TxPerf.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L1D2.TxPerf.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1D2.ShutOn.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOn.params, WOLDefault.params, EEELPI.params, TxPerf.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1D2.ShutOn.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L1D2.ShutOn.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1D2.LVOn.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, ECS.params, ShutOn.params, WOLDefault.params, EEELPI.params, TxPerf.params, Toshiba.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1D2.LVOn.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L1D2.LVOn.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1D2.PWMAll.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOn.params, WOLDefault.params, PWMAll.params, EEELPI.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1D2.PWMAll.ndi.HW]
Include = machine.inf
Needs = PciASPMOptIn
Addreg = Msi.Addreg

[L1D2.PWMAll.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1D2.DisS5.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, WOLDefault.params, EEELPI.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1D2.DisS5.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L1D2.DisS5.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1D2.MB.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, MB.params, ShutOn.params, WOLDefault.params, EEELPI.params, LongCable.params, ExRSS.params, MSIIcafeLinkPatch.params,SysLogoPatch.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1D2.MB.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L1D2.MB.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1D2.ECS.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOn.params, WOLMagic.params, EEELPI.params, ExRSS.params, SysLogoPatch.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1D2.ECS.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L1D2.ECS.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1D2.SONY.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, WOLDefault.params, EEELPIEn.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1D2.SONY.ndi.HW]
Include = machine.inf
Needs = PciASPMOptIn
Addreg = Msi.Addreg

[L1D2.SONY.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1D2.TOSHIBA.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOn.params, WOLDefault.params, PWMAll.params, EEELPI.params, TxPerf.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1D2.TOSHIBA.ndi.HW]
Include = machine.inf
Needs = PciASPMOptIn
Addreg = Msi.Addreg

[L1D2.TOSHIBA.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1D2.PEGA.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Pega.params, ShutOn.params, WOLDefault.params, EEELPI.params, TxPerf.params, ExRSS.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1D2.PEGA.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = Msi.Addreg

[L1D2.PEGA.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1F.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOff.params, WOLDefault.params, PM.params, RSS.params, Intr.params, EEELPI.params, Ecma.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1F.ndi.HW]
Include = machine.inf
Needs = PciASPMOptIn
Addreg = MsiX.Addreg

[L1F.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1F.PEGA.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, PEGAIP4.params, ShutOff.params, WOLDefault.params, PM.params, RSS.params, Intr.params, EEELPI.params, Ecma.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1F.PEGA.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = MsiX.Addreg

[L1F.PEGA.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1F.MB.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, MB.params, ShutOn.params, WOLDefault.params, PM.params, RSS.params, Intr.params, EEELPI.params, Ecma.params, MSIIcafeLinkPatch.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1F.MB.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = MsiX.Addreg

[L1F.MB.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1F.ShutOn.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOn.params, WOLDefault.params, PM.params, RSS.params, Intr.params, EEELPI.params, Ecma.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1F.ShutOn.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = MsiX.Addreg

[L1F.ShutOn.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1F.PWMAll.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOn.params, WOLDefault.params, PM.params, RSS.params, Intr.params, EEELPI.params, Ecma.params, PWMAll.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1F.PWMAll.ndi.HW]
Include = machine.inf
Needs = PciASPMOptIn
Addreg = MsiX.Addreg

[L1F.PWMAll.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1F.PWMAllLTR.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, Common.params, ShutOn.params, WOLDefault.params, PM.params, RSS.params, Intr.params, EEELPI.params, Ecma.params, PWMAll.params, LTR.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1F.PWMAllLTR.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = MsiX.Addreg

[L1F.PWMAllLTR.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L1F.NEC.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, L1C.params, FUJU.params, ShutOn.params, WOLDefault.params, PM.params, RSS.params, Intr.params, EEELPI.params, Ecma.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L1F.NEC.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = MsiX.Addreg

[L1F.NEC.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2F.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, Common.params, ShutOff.params, WOLDefault.params, PM.params, EEELPI.params, Ecma.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2F.ndi.HW]
Include = machine.inf
Needs = PciASPMOptIn
Addreg = MsiX.Addreg

[L2F.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2F.ShutOn.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, Common.params, ShutOn.params, WOLDefault.params, PM.params, EEELPI.params, Ecma.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2F.ShutOn.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = MsiX.Addreg

[L2F.ShutOn.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2F.PWMAll.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, Common.params, ShutOn.params, WOLDefault.params, PM.params, EEELPI.params, Ecma.params, PWMAll.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2F.PWMAll.ndi.HW]
Include = machine.inf
Needs = PciASPMOptIn
Addreg = MsiX.Addreg

[L2F.PWMAll.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog

[L2F.PWMAllLTR.ndi]
Characteristics = 0x84
BusType = 5 ;PCI
DelReg = Del.reg, EEELPI.Delreg
AddReg = L1C.reg, Common.params, ShutOn.params, WOLDefault.params, PM.params, EEELPI.params, Ecma.params, PWMAll.params, LTR.params
CopyFiles = L1C.CopyFiles
*IfType = 6 ; IF_TYPE_ETHERNET_CSMACD
*MediaType = 0 ; NdisMedium802_3
*PhysicalMediaType = 14 ; NdisPhysicalMedium802_3

[L2F.PWMAllLTR.ndi.HW]
Include = machine.inf
Needs = PciASPMOptOut
Addreg = MsiX.Addreg

[L2F.PWMAllLTR.ndi.Services]
AddService = L1C, 2, L1C.Service, L1C.EventLog
;-----------------------------------------------------------------------------
; L1C specific
;
[L1C.reg]
HKR, Ndi, HelpText,, %HelpText%
HKR, Ndi, Service, 0, "L1C"
; use ndis5 as the upper bound because NT supports it
HKR, Ndi\Interfaces, UpperRange, 0, "ndis5"
HKR, Ndi\Interfaces, LowerRange, 0, "ethernet"

[Msi.Addreg]
HKR, "Interrupt Management", 0x00000010
HKR, "Interrupt Management\MessageSignaledInterruptProperties", 0x00000010
HKR, "Interrupt Management\MessageSignaledInterruptProperties", MSISupported, 0x00010001, 0
HKR, "Interrupt Management\MessageSignaledInterruptProperties", MessageNumberLimit, 0x00010001, 1

[MsiX.Addreg]
HKR, "Interrupt Management", 0x00000010
HKR, "Interrupt Management\MessageSignaledInterruptProperties", 0x00000010
HKR, "Interrupt Management\MessageSignaledInterruptProperties", MSISupported, 0x00010001, 0

[Del.reg]
HKR, Ndi\Params\WakeUpCapabilities
;HKR, Ndi\Params\*RSS
;HKR, Ndi\Params\*NumRssQueues

[EEELPI.Delreg]
HKR, Ndi\Params\EEESupported

[L1C.Service]
DisplayName = %L1C.Service.DispName%
ServiceType = 1 ;%SERVICE_KERNEL_DRIVER%
StartType = 3 ;%SERVICE_DEMAND_START%
ErrorControl = 1 ;%SERVICE_ERROR_NORMAL%
ServiceBinary = %12%\L1C63x86.sys
LoadOrderGroup = NDIS

[L1C.EventLog]
AddReg = L1C.AddEventLog.reg

[L1C.AddEventLog.reg]
HKR,, EventMessageFile, 0x00020000, "%%SystemRoot%%\System32\netevent.dll"
HKR,, TypesSupported, 0x00010001, 7

[Toshiba.params]
HKR,, WOLMode, 0x00010001, 1

[ToPatch.params]
HKR,, ToPatch, 0x00010001, 1

[PWMAll.params]
HKR,, PnPCapabilities, 0x00010001, 0x0120

[ASPM1M.params]
HKR,, ASPMLim, 0x00010001, 1

[LongCable.params]
HKR,, LongCable, 0x00010001, 1

[TxPerf.params]
HKR,, TxPerf, 0x00010001, 1

[Intr.params]
HKR,, MSIX, 0x00010001, 1

[MSIIcafeLinkPatch.params]
HKR,, MSIIcafeLinkPatch,0x00010001, 1

[SysLogoPatch.params]
HKR,, SysLogoPatch, 0x00010001, 1

[FSWOL.params]
HKR,, FSS5WOL, 0x00010001, 1

[LTR.params]
HKR,, LTR, 0x00010001, 1

[L1C.params]
HKR, Ndi\Params\*JumboPacket, ParamDesc, 0, %JumboFrame%
HKR, Ndi\Params\*JumboPacket, default, 0, "1514"
HKR, Ndi\Params\*JumboPacket, type, 0, "enum"
HKR, Ndi\Params\*JumboPacket\enum, "1514", 0, %Disabled%
HKR, Ndi\Params\*JumboPacket\enum, "2048", 0, %2KBMTU%
HKR, Ndi\Params\*JumboPacket\enum, "3072", 0, %3KBMTU%
HKR, Ndi\Params\*JumboPacket\enum, "4096", 0, %4KBMTU%
HKR, Ndi\Params\*JumboPacket\enum, "5120", 0, %5KBMTU%
HKR, Ndi\Params\*JumboPacket\enum, "6144", 0, %6KBMTU%
HKR, Ndi\Params\*JumboPacket\enum, "7168", 0, %7KBMTU%
HKR, Ndi\params\*JumboPacket\enum, "8192", 0, %8KBMTU%
HKR, Ndi\params\*JumboPacket\enum, "9216", 0, %9KBMTU%

[ExRSS.params]
HKR, Ndi\Params\RSS, ParamDesc, 0, %RSS%
HKR, Ndi\Params\RSS, Type, 0, "enum"
HKR, Ndi\Params\RSS\enum, 1, 0, %Enabled%
HKR, Ndi\Params\RSS\enum, 0, 0, %Disabled%
HKR, Ndi\Params\RSS, Default, 0, "0"

[RSS.params]
;HKR, Ndi\Params\RSS, ParamDesc, 0, %RSS%
;HKR, Ndi\Params\RSS, Type, 0, "enum"
;HKR, Ndi\Params\RSS\enum, 1, 0, %Enabled%
;HKR, Ndi\Params\RSS\enum, 0, 0, %Disabled%
;HKR, Ndi\Params\RSS, Default, 0, "1"

;HKR, Ndi\Params\NumRssQueues, ParamDesc, 0, %RssQs%
;HKR, Ndi\Params\NumRssQueues, Type, 0, "enum"
;HKR, Ndi\Params\NumRssQueues\enum, "4", 0, "4 RSS Queues"
;HKR, Ndi\Params\NumRssQueues\enum, "2", 0, "2 RSS Queues"
;HKR, Ndi\Params\NumRssQueues\enum, "1", 0, "1 RSS Queues"
;HKR, Ndi\Params\NumRssQueues, Default, 0, "4"

HKR, Ndi\Params\*RSS, ParamDesc, 0, %RSS%
HKR, Ndi\Params\*RSS, Type, 0, "enum"
HKR, Ndi\Params\*RSS\enum, 1, 0, %Enabled%
HKR, Ndi\Params\*RSS\enum, 0, 0, %Disabled%
HKR, Ndi\Params\*RSS, Default, 0, "1"

HKR, Ndi\Params\*NumRssQueues, ParamDesc, 0, %RssQs%
HKR, Ndi\Params\*NumRssQueues, Type, 0, "enum"
;HKR, Ndi\Params\*NumRssQueues\enum, "8", 0, "8 RSS Queues"
;HKR, Ndi\Params\*NumRssQueues\enum, "6", 0, "6 RSS Queues"
HKR, Ndi\Params\*NumRssQueues\enum, "4", 0, "4 RSS Queues"
HKR, Ndi\Params\*NumRssQueues\enum, "2", 0, "2 RSS Queues"
HKR, Ndi\Params\*NumRssQueues\enum, "1", 0, "1 RSS Queues"
HKR, Ndi\Params\*NumRssQueues, Default, 0, "4"

[L2CB.params]
HKR, Ndi\Params\APSmode, ParamDesc, 0, %APSmode%
HKR, Ndi\Params\APSmode, Type, 0, "enum"
HKR, Ndi\Params\APSmode\enum, "1", 0, %Enabled%
HKR, Ndi\Params\APSmode\enum, "0", 0, %Disabled%
HKR, Ndi\Params\APSmode, Default, 0, "0"
;-----------------------------------------------------------------------------

[Ecma.params]
HKR, Ndi\Params\Ecma, ParamDesc, 0, %ECMA%
HKR, Ndi\Params\Ecma, Type, 0, "enum"
HKR, Ndi\Params\Ecma\enum, "1", 0, %Enabled%
HKR, Ndi\Params\Ecma\enum, "0", 0, %Disabled%
HKR, Ndi\Params\Ecma, Default, 0, "0"

[Common.params]
HKR, Ndi\Params\MaxInterrupt, ParamDesc, 0, %MaxIrq%
HKR, Ndi\Params\MaxInterrupt, Type, 0, "int"
HKR, Ndi\Params\MaxInterrupt, Base, 0, "10"
HKR, Ndi\Params\MaxInterrupt, Min, 0, "1000"
HKR, Ndi\Params\MaxInterrupt, Max, 0, "30000"
HKR, Ndi\Params\MaxInterrupt, Step, 0, "500"
HKR, Ndi\Params\MaxInterrupt, Default, 0, "5000"

HKR, Ndi\Params\*SpeedDuplex, ParamDesc, 0, %SpeedDuplex%
HKR, Ndi\Params\*SpeedDuplex, Type, 0, "enum"
HKR, Ndi\Params\*SpeedDuplex, Default, 0, "0"
HKR, Ndi\Params\*SpeedDuplex\enum, "0", 0, %Auto%
HKR, Ndi\Params\*SpeedDuplex\enum, "1", 0, %10MHD%
HKR, Ndi\Params\*SpeedDuplex\enum, "2", 0, %10MFD%
HKR, Ndi\Params\*SpeedDuplex\enum, "3", 0, %100MHD%
HKR, Ndi\Params\*SpeedDuplex\enum, "4", 0, %100MFD%

HKR, Ndi\Params\*ReceiveBuffers, ParamDesc, 0, %ReceiveBuffers%
HKR, Ndi\Params\*ReceiveBuffers, Type, 0, "int"
HKR, Ndi\Params\*ReceiveBuffers, Base, 0, "10"
HKR, Ndi\Params\*ReceiveBuffers, Min, 0, "16"
HKR, Ndi\Params\*ReceiveBuffers, Max, 0, "2048"
HKR, Ndi\Params\*ReceiveBuffers, Step, 0, "16"
HKR, Ndi\Params\*ReceiveBuffers, Default, 0, "512"

HKR, Ndi\Params\*TransmitBuffers, ParamDesc, 0, %TransmitBuffers%
HKR, Ndi\Params\*TransmitBuffers, Type, 0, "int"
HKR, Ndi\Params\*TransmitBuffers, Base, 0, "10"
HKR, Ndi\Params\*TransmitBuffers, Min, 0, "16"
HKR, Ndi\Params\*TransmitBuffers, Max, 0, "1024"
HKR, Ndi\Params\*TransmitBuffers, Step, 0, "16"
HKR, Ndi\Params\*TransmitBuffers, Default, 0, "256"

HKR, Ndi\Params\*TCPChecksumOffloadIPv4, ParamDesc, 0, %TCPChksumOffv4%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4, Type, 0, "enum"
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4, Default, 0, "3"

HKR, Ndi\Params\*IPChecksumOffloadIPv4, ParamDesc, 0, %IPChksumOffv4%
HKR, Ndi\Params\*IPChecksumOffloadIPv4, Type, 0, "enum"
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*IPChecksumOffloadIPv4, Default, 0, "3"

HKR, Ndi\Params\*UDPChecksumOffloadIPv4, ParamDesc, 0, %UDPChksumOffv4%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4, Type, 0, "enum"
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4, Default, 0, "3"

HKR, Ndi\Params\*TCPChecksumOffloadIPv6, ParamDesc, 0, %TCPChksumOffv6%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6, Type, 0, "enum"
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6, Default, 0, "3"

HKR, Ndi\Params\*UDPChecksumOffloadIPv6, ParamDesc, 0, %UDPChksumOffv6%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6, Type, 0, "enum"
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6, Default, 0, "3"

HKR, Ndi\Params\*LsoV1IPv4, ParamDesc, 0, %LSOv1IPv4%
HKR, Ndi\Params\*LsoV1IPv4, Type, 0, "enum"
HKR, Ndi\Params\*LsoV1IPv4\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*LsoV1IPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*LsoV1IPv4, Default, 0, "1"

HKR, Ndi\Params\*LsoV2IPv4, ParamDesc, 0, %LSOv2IPv4%
HKR, Ndi\Params\*LsoV2IPv4, Type, 0, "enum"
HKR, Ndi\Params\*LsoV2IPv4\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*LsoV2IPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*LsoV2IPv4, Default, 0, "1"

HKR, Ndi\Params\*LsoV2IPv6, ParamDesc, 0, %LSOv2IPv6%
HKR, Ndi\Params\*LsoV2IPv6, Type, 0, "enum"
HKR, Ndi\Params\*LsoV2IPv6\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*LsoV2IPv6\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*LsoV2IPv6, Default, 0, "1"

HKR, Ndi\Params\NetworkAddress, ParamDesc, 0, %NetAddress%
HKR, Ndi\Params\NetworkAddress, Type, 0, "edit"
HKR, Ndi\Params\NetworkAddress, LimitText, 0, "12"
HKR, Ndi\Params\NetworkAddress, UpperCase, 0, "1"
HKR, Ndi\Params\NetworkAddress, Default, 0, ""
HKR, Ndi\Params\NetworkAddress, Optional, 0, "1"

HKR, Ndi\Params\*InterruptModeration, ParamDesc, 0, %IntMod%
HKR, Ndi\Params\*InterruptModeration, Type, 0, "enum"
HKR, Ndi\Params\*InterruptModeration\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*InterruptModeration\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*InterruptModeration, Default, 0, "1"

HKR, Ndi\Params\*FlowControl, ParamDesc, 0, %FlowCtrl%
HKR, Ndi\Params\*FlowControl, Type, 0, "enum"
HKR, Ndi\Params\*FlowControl\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*FlowControl\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*FlowControl, Default, 0, "3"

HKR, Ndi\Params\VLanID, ParamDesc, 0, %VLanID%
HKR, Ndi\Params\VLanID, Type, 0, "long"
HKR, Ndi\Params\VLanID, Base, 0, "10"
HKR, Ndi\Params\VLanID, Min, 0, "0"
HKR, Ndi\Params\VLanID, Max, 0, "4094"
HKR, Ndi\Params\VLanID, Step, 0, "1"
HKR, Ndi\Params\VLanID, Default, 0, "0"

HKR, Ndi\Params\Ioac_SwoiSupported, ParamDesc, 0, %SWOI%
HKR, Ndi\Params\Ioac_SwoiSupported, Type, 0, "enum"
HKR, Ndi\Params\Ioac_SwoiSupported\enum, "1", 0, %Enabled%
HKR, Ndi\Params\Ioac_SwoiSupported\enum, "0", 0, %Disabled%
HKR, Ndi\Params\Ioac_SwoiSupported, Default, 0, "0"

[PEGAIP4.params]
HKR, Ndi\Params\MaxInterrupt, ParamDesc, 0, %MaxIrq%
HKR, Ndi\Params\MaxInterrupt, Type, 0, "int"
HKR, Ndi\Params\MaxInterrupt, Base, 0, "10"
HKR, Ndi\Params\MaxInterrupt, Min, 0, "1000"
HKR, Ndi\Params\MaxInterrupt, Max, 0, "30000"
HKR, Ndi\Params\MaxInterrupt, Step, 0, "500"
HKR, Ndi\Params\MaxInterrupt, Default, 0, "5000"

HKR, Ndi\Params\*SpeedDuplex, ParamDesc, 0, %SpeedDuplex%
HKR, Ndi\Params\*SpeedDuplex, Type, 0, "enum"
HKR, Ndi\Params\*SpeedDuplex, Default, 0, "0"
HKR, Ndi\Params\*SpeedDuplex\enum, "0", 0, %Auto%
HKR, Ndi\Params\*SpeedDuplex\enum, "1", 0, %10MHD%
HKR, Ndi\Params\*SpeedDuplex\enum, "2", 0, %10MFD%
HKR, Ndi\Params\*SpeedDuplex\enum, "3", 0, %100MHD%
HKR, Ndi\Params\*SpeedDuplex\enum, "4", 0, %100MFD%

HKR, Ndi\Params\*ReceiveBuffers, ParamDesc, 0, %ReceiveBuffers%
HKR, Ndi\Params\*ReceiveBuffers, Type, 0, "int"
HKR, Ndi\Params\*ReceiveBuffers, Base, 0, "10"
HKR, Ndi\Params\*ReceiveBuffers, Min, 0, "16"
HKR, Ndi\Params\*ReceiveBuffers, Max, 0, "2048"
HKR, Ndi\Params\*ReceiveBuffers, Step, 0, "16"
HKR, Ndi\Params\*ReceiveBuffers, Default, 0, "512"

HKR, Ndi\Params\*TransmitBuffers, ParamDesc, 0, %TransmitBuffers%
HKR, Ndi\Params\*TransmitBuffers, Type, 0, "int"
HKR, Ndi\Params\*TransmitBuffers, Base, 0, "10"
HKR, Ndi\Params\*TransmitBuffers, Min, 0, "16"
HKR, Ndi\Params\*TransmitBuffers, Max, 0, "1024"
HKR, Ndi\Params\*TransmitBuffers, Step, 0, "16"
HKR, Ndi\Params\*TransmitBuffers, Default, 0, "256"

HKR, Ndi\Params\*TCPChecksumOffloadIPv4, ParamDesc, 0, %TCPChksumOffv4%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4, Type, 0, "enum"
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4, Default, 0, "3"

HKR, Ndi\Params\*IPChecksumOffloadIPv4, ParamDesc, 0, %IPChksumOffv4%
HKR, Ndi\Params\*IPChecksumOffloadIPv4, Type, 0, "enum"
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*IPChecksumOffloadIPv4, Default, 0, "3"

HKR, Ndi\Params\*UDPChecksumOffloadIPv4, ParamDesc, 0, %UDPChksumOffv4%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4, Type, 0, "enum"
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4, Default, 0, "3"

HKR, Ndi\Params\*TCPChecksumOffloadIPv6, ParamDesc, 0, %TCPChksumOffv6%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6, Type, 0, "enum"
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6, Default, 0, "3"

HKR, Ndi\Params\*UDPChecksumOffloadIPv6, ParamDesc, 0, %UDPChksumOffv6%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6, Type, 0, "enum"
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6, Default, 0, "3"

HKR, Ndi\Params\*LsoV1IPv4, ParamDesc, 0, %LSOv1IPv4%
HKR, Ndi\Params\*LsoV1IPv4, Type, 0, "enum"
HKR, Ndi\Params\*LsoV1IPv4\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*LsoV1IPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*LsoV1IPv4, Default, 0, "0"

HKR, Ndi\Params\*LsoV2IPv4, ParamDesc, 0, %LSOv2IPv4%
HKR, Ndi\Params\*LsoV2IPv4, Type, 0, "enum"
HKR, Ndi\Params\*LsoV2IPv4\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*LsoV2IPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*LsoV2IPv4, Default, 0, "1"

HKR, Ndi\Params\*LsoV2IPv6, ParamDesc, 0, %LSOv2IPv6%
HKR, Ndi\Params\*LsoV2IPv6, Type, 0, "enum"
HKR, Ndi\Params\*LsoV2IPv6\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*LsoV2IPv6\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*LsoV2IPv6, Default, 0, "0"

HKR, Ndi\Params\NetworkAddress, ParamDesc, 0, %NetAddress%
HKR, Ndi\Params\NetworkAddress, Type, 0, "edit"
HKR, Ndi\Params\NetworkAddress, LimitText, 0, "12"
HKR, Ndi\Params\NetworkAddress, UpperCase, 0, "1"
HKR, Ndi\Params\NetworkAddress, Default, 0, ""
HKR, Ndi\Params\NetworkAddress, Optional, 0, "1"

HKR, Ndi\Params\*InterruptModeration, ParamDesc, 0, %IntMod%
HKR, Ndi\Params\*InterruptModeration, Type, 0, "enum"
HKR, Ndi\Params\*InterruptModeration\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*InterruptModeration\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*InterruptModeration, Default, 0, "1"

HKR, Ndi\Params\*FlowControl, ParamDesc, 0, %FlowCtrl%
HKR, Ndi\Params\*FlowControl, Type, 0, "enum"
HKR, Ndi\Params\*FlowControl\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*FlowControl\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*FlowControl, Default, 0, "3"

HKR, Ndi\Params\VLanID, ParamDesc, 0, %VLanID%
HKR, Ndi\Params\VLanID, Type, 0, "long"
HKR, Ndi\Params\VLanID, Base, 0, "10"
HKR, Ndi\Params\VLanID, Min, 0, "0"
HKR, Ndi\Params\VLanID, Max, 0, "4094"
HKR, Ndi\Params\VLanID, Step, 0, "1"
HKR, Ndi\Params\VLanID, Default, 0, "0"

[MBCommon.params]
HKR, Ndi\Params\MaxInterrupt, ParamDesc, 0, %MaxIrq%
HKR, Ndi\Params\MaxInterrupt, Type, 0, "int"
HKR, Ndi\Params\MaxInterrupt, Base, 0, "10"
HKR, Ndi\Params\MaxInterrupt, Min, 0, "1000"
HKR, Ndi\Params\MaxInterrupt, Max, 0, "30000"
HKR, Ndi\Params\MaxInterrupt, Step, 0, "500"
HKR, Ndi\Params\MaxInterrupt, Default, 0, "5000"

HKR, Ndi\Params\*SpeedDuplex, ParamDesc, 0, %SpeedDuplex%
HKR, Ndi\Params\*SpeedDuplex, Type, 0, "enum"
HKR, Ndi\Params\*SpeedDuplex, Default, 0, "0"
HKR, Ndi\Params\*SpeedDuplex\enum, "0", 0, %Auto%
HKR, Ndi\Params\*SpeedDuplex\enum, "1", 0, %10MHD%
HKR, Ndi\Params\*SpeedDuplex\enum, "2", 0, %10MFD%
HKR, Ndi\Params\*SpeedDuplex\enum, "3", 0, %100MHD%
HKR, Ndi\Params\*SpeedDuplex\enum, "4", 0, %100MFD%

HKR, Ndi\Params\*ReceiveBuffers, ParamDesc, 0, %ReceiveBuffers%
HKR, Ndi\Params\*ReceiveBuffers, Type, 0, "int"
HKR, Ndi\Params\*ReceiveBuffers, Base, 0, "10"
HKR, Ndi\Params\*ReceiveBuffers, Min, 0, "16"
HKR, Ndi\Params\*ReceiveBuffers, Max, 0, "2048"
HKR, Ndi\Params\*ReceiveBuffers, Step, 0, "16"
HKR, Ndi\Params\*ReceiveBuffers, Default, 0, "512"

HKR, Ndi\Params\*TransmitBuffers, ParamDesc, 0, %TransmitBuffers%
HKR, Ndi\Params\*TransmitBuffers, Type, 0, "int"
HKR, Ndi\Params\*TransmitBuffers, Base, 0, "10"
HKR, Ndi\Params\*TransmitBuffers, Min, 0, "16"
HKR, Ndi\Params\*TransmitBuffers, Max, 0, "1024"
HKR, Ndi\Params\*TransmitBuffers, Step, 0, "16"
HKR, Ndi\Params\*TransmitBuffers, Default, 0, "256"

HKR, Ndi\Params\*TCPChecksumOffloadIPv4, ParamDesc, 0, %TCPChksumOffv4%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4, Type, 0, "enum"
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4, Default, 0, "3"

HKR, Ndi\Params\*IPChecksumOffloadIPv4, ParamDesc, 0, %IPChksumOffv4%
HKR, Ndi\Params\*IPChecksumOffloadIPv4, Type, 0, "enum"
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*IPChecksumOffloadIPv4, Default, 0, "0"

HKR, Ndi\Params\*UDPChecksumOffloadIPv4, ParamDesc, 0, %UDPChksumOffv4%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4, Type, 0, "enum"
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4, Default, 0, "3"

HKR, Ndi\Params\*TCPChecksumOffloadIPv6, ParamDesc, 0, %TCPChksumOffv6%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6, Type, 0, "enum"
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6, Default, 0, "3"

HKR, Ndi\Params\*UDPChecksumOffloadIPv6, ParamDesc, 0, %UDPChksumOffv6%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6, Type, 0, "enum"
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6, Default, 0, "3"

HKR, Ndi\Params\*LsoV1IPv4, ParamDesc, 0, %LSOv1IPv4%
HKR, Ndi\Params\*LsoV1IPv4, Type, 0, "enum"
HKR, Ndi\Params\*LsoV1IPv4\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*LsoV1IPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*LsoV1IPv4, Default, 0, "0"

HKR, Ndi\Params\*LsoV2IPv4, ParamDesc, 0, %LSOv2IPv4%
HKR, Ndi\Params\*LsoV2IPv4, Type, 0, "enum"
HKR, Ndi\Params\*LsoV2IPv4\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*LsoV2IPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*LsoV2IPv4, Default, 0, "0"

HKR, Ndi\Params\*LsoV2IPv6, ParamDesc, 0, %LSOv2IPv6%
HKR, Ndi\Params\*LsoV2IPv6, Type, 0, "enum"
HKR, Ndi\Params\*LsoV2IPv6\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*LsoV2IPv6\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*LsoV2IPv6, Default, 0, "0"

HKR, Ndi\Params\NetworkAddress, ParamDesc, 0, %NetAddress%
HKR, Ndi\Params\NetworkAddress, Type, 0, "edit"
HKR, Ndi\Params\NetworkAddress, LimitText, 0, "12"
HKR, Ndi\Params\NetworkAddress, UpperCase, 0, "1"
HKR, Ndi\Params\NetworkAddress, Default, 0, ""
HKR, Ndi\Params\NetworkAddress, Optional, 0, "1"

HKR, Ndi\Params\*InterruptModeration, ParamDesc, 0, %IntMod%
HKR, Ndi\Params\*InterruptModeration, Type, 0, "enum"
HKR, Ndi\Params\*InterruptModeration\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*InterruptModeration\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*InterruptModeration, Default, 0, "1"

HKR, Ndi\Params\*FlowControl, ParamDesc, 0, %FlowCtrl%
HKR, Ndi\Params\*FlowControl, Type, 0, "enum"
HKR, Ndi\Params\*FlowControl\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*FlowControl\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*FlowControl, Default, 0, "3"

HKR, Ndi\Params\VLanID, ParamDesc, 0, %VLanID%
HKR, Ndi\Params\VLanID, Type, 0, "long"
HKR, Ndi\Params\VLanID, Base, 0, "10"
HKR, Ndi\Params\VLanID, Min, 0, "0"
HKR, Ndi\Params\VLanID, Max, 0, "4094"
HKR, Ndi\Params\VLanID, Step, 0, "1"
HKR, Ndi\Params\VLanID, Default, 0, "0"

[Pega.params]
HKR, Ndi\Params\MaxInterrupt, ParamDesc, 0, %MaxIrq%
HKR, Ndi\Params\MaxInterrupt, Type, 0, "int"
HKR, Ndi\Params\MaxInterrupt, Base, 0, "10"
HKR, Ndi\Params\MaxInterrupt, Min, 0, "1000"
HKR, Ndi\Params\MaxInterrupt, Max, 0, "30000"
HKR, Ndi\Params\MaxInterrupt, Step, 0, "500"
HKR, Ndi\Params\MaxInterrupt, Default, 0, "5000"

HKR, Ndi\Params\*SpeedDuplex, ParamDesc, 0, %SpeedDuplex%
HKR, Ndi\Params\*SpeedDuplex, Type, 0, "enum"
HKR, Ndi\Params\*SpeedDuplex, Default, 0, "0"
HKR, Ndi\Params\*SpeedDuplex\enum, "0", 0, %Auto%
HKR, Ndi\Params\*SpeedDuplex\enum, "1", 0, %10MHD%
HKR, Ndi\Params\*SpeedDuplex\enum, "2", 0, %10MFD%
HKR, Ndi\Params\*SpeedDuplex\enum, "3", 0, %100MHD%
HKR, Ndi\Params\*SpeedDuplex\enum, "4", 0, %100MFD%

HKR, Ndi\Params\*ReceiveBuffers, ParamDesc, 0, %ReceiveBuffers%
HKR, Ndi\Params\*ReceiveBuffers, Type, 0, "int"
HKR, Ndi\Params\*ReceiveBuffers, Base, 0, "10"
HKR, Ndi\Params\*ReceiveBuffers, Min, 0, "16"
HKR, Ndi\Params\*ReceiveBuffers, Max, 0, "2048"
HKR, Ndi\Params\*ReceiveBuffers, Step, 0, "16"
HKR, Ndi\Params\*ReceiveBuffers, Default, 0, "1024"

HKR, Ndi\Params\*TransmitBuffers, ParamDesc, 0, %TransmitBuffers%
HKR, Ndi\Params\*TransmitBuffers, Type, 0, "int"
HKR, Ndi\Params\*TransmitBuffers, Base, 0, "10"
HKR, Ndi\Params\*TransmitBuffers, Min, 0, "16"
HKR, Ndi\Params\*TransmitBuffers, Max, 0, "1024"
HKR, Ndi\Params\*TransmitBuffers, Step, 0, "16"
HKR, Ndi\Params\*TransmitBuffers, Default, 0, "256"

HKR, Ndi\Params\*TCPChecksumOffloadIPv4, ParamDesc, 0, %TCPChksumOffv4%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4, Type, 0, "enum"
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4, Default, 0, "3"

HKR, Ndi\Params\*IPChecksumOffloadIPv4, ParamDesc, 0, %IPChksumOffv4%
HKR, Ndi\Params\*IPChecksumOffloadIPv4, Type, 0, "enum"
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*IPChecksumOffloadIPv4, Default, 0, "3"

HKR, Ndi\Params\*UDPChecksumOffloadIPv4, ParamDesc, 0, %UDPChksumOffv4%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4, Type, 0, "enum"
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4, Default, 0, "3"

HKR, Ndi\Params\*TCPChecksumOffloadIPv6, ParamDesc, 0, %TCPChksumOffv6%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6, Type, 0, "enum"
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6, Default, 0, "3"

HKR, Ndi\Params\*UDPChecksumOffloadIPv6, ParamDesc, 0, %UDPChksumOffv6%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6, Type, 0, "enum"
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6, Default, 0, "3"

HKR, Ndi\Params\*LsoV1IPv4, ParamDesc, 0, %LSOv1IPv4%
HKR, Ndi\Params\*LsoV1IPv4, Type, 0, "enum"
HKR, Ndi\Params\*LsoV1IPv4\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*LsoV1IPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*LsoV1IPv4, Default, 0, "1"

HKR, Ndi\Params\*LsoV2IPv4, ParamDesc, 0, %LSOv2IPv4%
HKR, Ndi\Params\*LsoV2IPv4, Type, 0, "enum"
HKR, Ndi\Params\*LsoV2IPv4\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*LsoV2IPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*LsoV2IPv4, Default, 0, "0"

HKR, Ndi\Params\*LsoV2IPv6, ParamDesc, 0, %LSOv2IPv6%
HKR, Ndi\Params\*LsoV2IPv6, Type, 0, "enum"
HKR, Ndi\Params\*LsoV2IPv6\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*LsoV2IPv6\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*LsoV2IPv6, Default, 0, "0"

HKR, Ndi\Params\NetworkAddress, ParamDesc, 0, %NetAddress%
HKR, Ndi\Params\NetworkAddress, Type, 0, "edit"
HKR, Ndi\Params\NetworkAddress, LimitText, 0, "12"
HKR, Ndi\Params\NetworkAddress, UpperCase, 0, "1"
HKR, Ndi\Params\NetworkAddress, Default, 0, ""
HKR, Ndi\Params\NetworkAddress, Optional, 0, "1"

HKR, Ndi\Params\*InterruptModeration, ParamDesc, 0, %IntMod%
HKR, Ndi\Params\*InterruptModeration, Type, 0, "enum"
HKR, Ndi\Params\*InterruptModeration\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*InterruptModeration\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*InterruptModeration, Default, 0, "1"

HKR, Ndi\Params\*FlowControl, ParamDesc, 0, %FlowCtrl%
HKR, Ndi\Params\*FlowControl, Type, 0, "enum"
HKR, Ndi\Params\*FlowControl\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*FlowControl\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*FlowControl, Default, 0, "3"

HKR, Ndi\Params\VLanID, ParamDesc, 0, %VLanID%
HKR, Ndi\Params\VLanID, Type, 0, "long"
HKR, Ndi\Params\VLanID, Base, 0, "10"
HKR, Ndi\Params\VLanID, Min, 0, "0"
HKR, Ndi\Params\VLanID, Max, 0, "4094"
HKR, Ndi\Params\VLanID, Step, 0, "1"
HKR, Ndi\Params\VLanID, Default, 0, "0"

[FUJU.params]
HKR, Ndi\Params\MaxInterrupt, ParamDesc, 0, %MaxIrq%
HKR, Ndi\Params\MaxInterrupt, Type, 0, "int"
HKR, Ndi\Params\MaxInterrupt, Base, 0, "10"
HKR, Ndi\Params\MaxInterrupt, Min, 0, "1000"
HKR, Ndi\Params\MaxInterrupt, Max, 0, "30000"
HKR, Ndi\Params\MaxInterrupt, Step, 0, "500"
HKR, Ndi\Params\MaxInterrupt, Default, 0, "5000"

HKR, Ndi\Params\*SpeedDuplex, ParamDesc, 0, %SpeedDuplex%
HKR, Ndi\Params\*SpeedDuplex, Type, 0, "enum"
HKR, Ndi\Params\*SpeedDuplex, Default, 0, "0"
HKR, Ndi\Params\*SpeedDuplex\enum, "0", 0, %Auto%
HKR, Ndi\Params\*SpeedDuplex\enum, "1", 0, %10MHD%
HKR, Ndi\Params\*SpeedDuplex\enum, "2", 0, %10MFD%
HKR, Ndi\Params\*SpeedDuplex\enum, "3", 0, %100MHD%
HKR, Ndi\Params\*SpeedDuplex\enum, "4", 0, %100MFD%

HKR, Ndi\Params\*ReceiveBuffers, ParamDesc, 0, %ReceiveBuffers%
HKR, Ndi\Params\*ReceiveBuffers, Type, 0, "int"
HKR, Ndi\Params\*ReceiveBuffers, Base, 0, "10"
HKR, Ndi\Params\*ReceiveBuffers, Min, 0, "16"
HKR, Ndi\Params\*ReceiveBuffers, Max, 0, "2048"
HKR, Ndi\Params\*ReceiveBuffers, Step, 0, "16"
HKR, Ndi\Params\*ReceiveBuffers, Default, 0, "512"

HKR, Ndi\Params\*TransmitBuffers, ParamDesc, 0, %TransmitBuffers%
HKR, Ndi\Params\*TransmitBuffers, Type, 0, "int"
HKR, Ndi\Params\*TransmitBuffers, Base, 0, "10"
HKR, Ndi\Params\*TransmitBuffers, Min, 0, "16"
HKR, Ndi\Params\*TransmitBuffers, Max, 0, "1024"
HKR, Ndi\Params\*TransmitBuffers, Step, 0, "16"
HKR, Ndi\Params\*TransmitBuffers, Default, 0, "256"

HKR, Ndi\Params\*TCPChecksumOffloadIPv4, ParamDesc, 0, %TCPChksumOffv4%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4, Type, 0, "enum"
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4, Default, 0, "3"

HKR, Ndi\Params\*IPChecksumOffloadIPv4, ParamDesc, 0, %IPChksumOffv4%
HKR, Ndi\Params\*IPChecksumOffloadIPv4, Type, 0, "enum"
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*IPChecksumOffloadIPv4, Default, 0, "3"

HKR, Ndi\Params\*UDPChecksumOffloadIPv4, ParamDesc, 0, %UDPChksumOffv4%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4, Type, 0, "enum"
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4, Default, 0, "3"

HKR, Ndi\Params\*TCPChecksumOffloadIPv6, ParamDesc, 0, %TCPChksumOffv6%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6, Type, 0, "enum"
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6, Default, 0, "3"

HKR, Ndi\Params\*UDPChecksumOffloadIPv6, ParamDesc, 0, %UDPChksumOffv6%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6, Type, 0, "enum"
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6, Default, 0, "3"

HKR, Ndi\Params\*LsoV1IPv4, ParamDesc, 0, %LSOv1IPv4%
HKR, Ndi\Params\*LsoV1IPv4, Type, 0, "enum"
HKR, Ndi\Params\*LsoV1IPv4\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*LsoV1IPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*LsoV1IPv4, Default, 0, "1"

HKR, Ndi\Params\*LsoV2IPv4, ParamDesc, 0, %LSOv2IPv4%
HKR, Ndi\Params\*LsoV2IPv4, Type, 0, "enum"
HKR, Ndi\Params\*LsoV2IPv4\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*LsoV2IPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*LsoV2IPv4, Default, 0, "0"

HKR, Ndi\Params\*LsoV2IPv6, ParamDesc, 0, %LSOv2IPv6%
HKR, Ndi\Params\*LsoV2IPv6, Type, 0, "enum"
HKR, Ndi\Params\*LsoV2IPv6\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*LsoV2IPv6\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*LsoV2IPv6, Default, 0, "0"

HKR, Ndi\Params\NetworkAddress, ParamDesc, 0, %NetAddress%
HKR, Ndi\Params\NetworkAddress, Type, 0, "edit"
HKR, Ndi\Params\NetworkAddress, LimitText, 0, "12"
HKR, Ndi\Params\NetworkAddress, UpperCase, 0, "1"
HKR, Ndi\Params\NetworkAddress, Default, 0, ""
HKR, Ndi\Params\NetworkAddress, Optional, 0, "1"

HKR, Ndi\Params\*InterruptModeration, ParamDesc, 0, %IntMod%
HKR, Ndi\Params\*InterruptModeration, Type, 0, "enum"
HKR, Ndi\Params\*InterruptModeration\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*InterruptModeration\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*InterruptModeration, Default, 0, "1"

HKR, Ndi\Params\*FlowControl, ParamDesc, 0, %FlowCtrl%
HKR, Ndi\Params\*FlowControl, Type, 0, "enum"
HKR, Ndi\Params\*FlowControl\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*FlowControl\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*FlowControl, Default, 0, "0"

HKR, Ndi\Params\VLanID, ParamDesc, 0, %VLanID%
HKR, Ndi\Params\VLanID, Type, 0, "long"
HKR, Ndi\Params\VLanID, Base, 0, "10"
HKR, Ndi\Params\VLanID, Min, 0, "0"
HKR, Ndi\Params\VLanID, Max, 0, "4094"
HKR, Ndi\Params\VLanID, Step, 0, "1"
HKR, Ndi\Params\VLanID, Default, 0, "0"

[ECS.params]
HKR, Ndi\Params\MaxInterrupt, ParamDesc, 0, %MaxIrq%
HKR, Ndi\Params\MaxInterrupt, Type, 0, "int"
HKR, Ndi\Params\MaxInterrupt, Base, 0, "10"
HKR, Ndi\Params\MaxInterrupt, Min, 0, "1000"
HKR, Ndi\Params\MaxInterrupt, Max, 0, "30000"
HKR, Ndi\Params\MaxInterrupt, Step, 0, "500"
HKR, Ndi\Params\MaxInterrupt, Default, 0, "5000"

HKR, Ndi\Params\*SpeedDuplex, ParamDesc, 0, %SpeedDuplex%
HKR, Ndi\Params\*SpeedDuplex, Type, 0, "enum"
HKR, Ndi\Params\*SpeedDuplex, Default, 0, "0"
HKR, Ndi\Params\*SpeedDuplex\enum, "0", 0, %Auto%
HKR, Ndi\Params\*SpeedDuplex\enum, "1", 0, %10MHD%
HKR, Ndi\Params\*SpeedDuplex\enum, "2", 0, %10MFD%
HKR, Ndi\Params\*SpeedDuplex\enum, "3", 0, %100MHD%
HKR, Ndi\Params\*SpeedDuplex\enum, "4", 0, %100MFD%
HKR, Ndi\Params\*SpeedDuplex\enum, "6", 0, %1GFD%

HKR, Ndi\Params\*ReceiveBuffers, ParamDesc, 0, %ReceiveBuffers%
HKR, Ndi\Params\*ReceiveBuffers, Type, 0, "int"
HKR, Ndi\Params\*ReceiveBuffers, Base, 0, "10"
HKR, Ndi\Params\*ReceiveBuffers, Min, 0, "16"
HKR, Ndi\Params\*ReceiveBuffers, Max, 0, "2048"
HKR, Ndi\Params\*ReceiveBuffers, Step, 0, "16"
HKR, Ndi\Params\*ReceiveBuffers, Default, 0, "512"

HKR, Ndi\Params\*TransmitBuffers, ParamDesc, 0, %TransmitBuffers%
HKR, Ndi\Params\*TransmitBuffers, Type, 0, "int"
HKR, Ndi\Params\*TransmitBuffers, Base, 0, "10"
HKR, Ndi\Params\*TransmitBuffers, Min, 0, "16"
HKR, Ndi\Params\*TransmitBuffers, Max, 0, "1024"
HKR, Ndi\Params\*TransmitBuffers, Step, 0, "16"
HKR, Ndi\Params\*TransmitBuffers, Default, 0, "256"

HKR, Ndi\Params\*TCPChecksumOffloadIPv4, ParamDesc, 0, %TCPChksumOffv4%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4, Type, 0, "enum"
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4, Default, 0, "3"

HKR, Ndi\Params\*IPChecksumOffloadIPv4, ParamDesc, 0, %IPChksumOffv4%
HKR, Ndi\Params\*IPChecksumOffloadIPv4, Type, 0, "enum"
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*IPChecksumOffloadIPv4, Default, 0, "3"

HKR, Ndi\Params\*UDPChecksumOffloadIPv4, ParamDesc, 0, %UDPChksumOffv4%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4, Type, 0, "enum"
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4, Default, 0, "3"

HKR, Ndi\Params\*TCPChecksumOffloadIPv6, ParamDesc, 0, %TCPChksumOffv6%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6, Type, 0, "enum"
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6, Default, 0, "3"

HKR, Ndi\Params\*UDPChecksumOffloadIPv6, ParamDesc, 0, %UDPChksumOffv6%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6, Type, 0, "enum"
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6, Default, 0, "3"

HKR, Ndi\Params\*LsoV1IPv4, ParamDesc, 0, %LSOv1IPv4%
HKR, Ndi\Params\*LsoV1IPv4, Type, 0, "enum"
HKR, Ndi\Params\*LsoV1IPv4\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*LsoV1IPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*LsoV1IPv4, Default, 0, "1"

HKR, Ndi\Params\*LsoV2IPv4, ParamDesc, 0, %LSOv2IPv4%
HKR, Ndi\Params\*LsoV2IPv4, Type, 0, "enum"
HKR, Ndi\Params\*LsoV2IPv4\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*LsoV2IPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*LsoV2IPv4, Default, 0, "0"

HKR, Ndi\Params\*LsoV2IPv6, ParamDesc, 0, %LSOv2IPv6%
HKR, Ndi\Params\*LsoV2IPv6, Type, 0, "enum"
HKR, Ndi\Params\*LsoV2IPv6\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*LsoV2IPv6\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*LsoV2IPv6, Default, 0, "0"

HKR, Ndi\Params\NetworkAddress, ParamDesc, 0, %NetAddress%
HKR, Ndi\Params\NetworkAddress, Type, 0, "edit"
HKR, Ndi\Params\NetworkAddress, LimitText, 0, "12"
HKR, Ndi\Params\NetworkAddress, UpperCase, 0, "1"
HKR, Ndi\Params\NetworkAddress, Default, 0, ""
HKR, Ndi\Params\NetworkAddress, Optional, 0, "1"

HKR, Ndi\Params\*InterruptModeration, ParamDesc, 0, %IntMod%
HKR, Ndi\Params\*InterruptModeration, Type, 0, "enum"
HKR, Ndi\Params\*InterruptModeration\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*InterruptModeration\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*InterruptModeration, Default, 0, "1"

HKR, Ndi\Params\*FlowControl, ParamDesc, 0, %FlowCtrl%
HKR, Ndi\Params\*FlowControl, Type, 0, "enum"
HKR, Ndi\Params\*FlowControl\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*FlowControl\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*FlowControl, Default, 0, "0"

HKR, Ndi\Params\VLanID, ParamDesc, 0, %VLanID%
HKR, Ndi\Params\VLanID, Type, 0, "long"
HKR, Ndi\Params\VLanID, Base, 0, "10"
HKR, Ndi\Params\VLanID, Min, 0, "0"
HKR, Ndi\Params\VLanID, Max, 0, "4094"
HKR, Ndi\Params\VLanID, Step, 0, "1"
HKR, Ndi\Params\VLanID, Default, 0, "0"

[MB.params]
HKR, Ndi\Params\MaxInterrupt, ParamDesc, 0, %MaxIrq%
HKR, Ndi\Params\MaxInterrupt, Type, 0, "int"
HKR, Ndi\Params\MaxInterrupt, Base, 0, "10"
HKR, Ndi\Params\MaxInterrupt, Min, 0, "1000"
HKR, Ndi\Params\MaxInterrupt, Max, 0, "30000"
HKR, Ndi\Params\MaxInterrupt, Step, 0, "500"
HKR, Ndi\Params\MaxInterrupt, Default, 0, "5000"

HKR, Ndi\Params\*SpeedDuplex, ParamDesc, 0, %SpeedDuplex%
HKR, Ndi\Params\*SpeedDuplex, Type, 0, "enum"
HKR, Ndi\Params\*SpeedDuplex, Default, 0, "0"
HKR, Ndi\Params\*SpeedDuplex\enum, "0", 0, %Auto%
HKR, Ndi\Params\*SpeedDuplex\enum, "1", 0, %10MHD%
HKR, Ndi\Params\*SpeedDuplex\enum, "2", 0, %10MFD%
HKR, Ndi\Params\*SpeedDuplex\enum, "3", 0, %100MHD%
HKR, Ndi\Params\*SpeedDuplex\enum, "4", 0, %100MFD%
HKR, Ndi\Params\*SpeedDuplex\enum, "6", 0, %1GFD%

HKR, Ndi\Params\*ReceiveBuffers, ParamDesc, 0, %ReceiveBuffers%
HKR, Ndi\Params\*ReceiveBuffers, Type, 0, "int"
HKR, Ndi\Params\*ReceiveBuffers, Base, 0, "10"
HKR, Ndi\Params\*ReceiveBuffers, Min, 0, "16"
HKR, Ndi\Params\*ReceiveBuffers, Max, 0, "2048"
HKR, Ndi\Params\*ReceiveBuffers, Step, 0, "16"
HKR, Ndi\Params\*ReceiveBuffers, Default, 0, "512"

HKR, Ndi\Params\*TransmitBuffers, ParamDesc, 0, %TransmitBuffers%
HKR, Ndi\Params\*TransmitBuffers, Type, 0, "int"
HKR, Ndi\Params\*TransmitBuffers, Base, 0, "10"
HKR, Ndi\Params\*TransmitBuffers, Min, 0, "16"
HKR, Ndi\Params\*TransmitBuffers, Max, 0, "1024"
HKR, Ndi\Params\*TransmitBuffers, Step, 0, "16"
HKR, Ndi\Params\*TransmitBuffers, Default, 0, "256"

HKR, Ndi\Params\*TCPChecksumOffloadIPv4, ParamDesc, 0, %TCPChksumOffv4%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4, Type, 0, "enum"
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*TCPChecksumOffloadIPv4, Default, 0, "3"

HKR, Ndi\Params\*IPChecksumOffloadIPv4, ParamDesc, 0, %IPChksumOffv4%
HKR, Ndi\Params\*IPChecksumOffloadIPv4, Type, 0, "enum"
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*IPChecksumOffloadIPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*IPChecksumOffloadIPv4, Default, 0, "0"

HKR, Ndi\Params\*UDPChecksumOffloadIPv4, ParamDesc, 0, %UDPChksumOffv4%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4, Type, 0, "enum"
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*UDPChecksumOffloadIPv4, Default, 0, "3"

HKR, Ndi\Params\*TCPChecksumOffloadIPv6, ParamDesc, 0, %TCPChksumOffv6%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6, Type, 0, "enum"
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*TCPChecksumOffloadIPv6, Default, 0, "3"

HKR, Ndi\Params\*UDPChecksumOffloadIPv6, ParamDesc, 0, %UDPChksumOffv6%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6, Type, 0, "enum"
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "2", 0, %RXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "1", 0, %TXEna%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*UDPChecksumOffloadIPv6, Default, 0, "3"

HKR, Ndi\Params\*LsoV1IPv4, ParamDesc, 0, %LSOv1IPv4%
HKR, Ndi\Params\*LsoV1IPv4, Type, 0, "enum"
HKR, Ndi\Params\*LsoV1IPv4\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*LsoV1IPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*LsoV1IPv4, Default, 0, "0"

HKR, Ndi\Params\*LsoV2IPv4, ParamDesc, 0, %LSOv2IPv4%
HKR, Ndi\Params\*LsoV2IPv4, Type, 0, "enum"
HKR, Ndi\Params\*LsoV2IPv4\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*LsoV2IPv4\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*LsoV2IPv4, Default, 0, "0"

HKR, Ndi\Params\*LsoV2IPv6, ParamDesc, 0, %LSOv2IPv6%
HKR, Ndi\Params\*LsoV2IPv6, Type, 0, "enum"
HKR, Ndi\Params\*LsoV2IPv6\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*LsoV2IPv6\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*LsoV2IPv6, Default, 0, "0"

HKR, Ndi\Params\NetworkAddress, ParamDesc, 0, %NetAddress%
HKR, Ndi\Params\NetworkAddress, Type, 0, "edit"
HKR, Ndi\Params\NetworkAddress, LimitText, 0, "12"
HKR, Ndi\Params\NetworkAddress, UpperCase, 0, "1"
HKR, Ndi\Params\NetworkAddress, Default, 0, ""
HKR, Ndi\Params\NetworkAddress, Optional, 0, "1"

HKR, Ndi\Params\*InterruptModeration, ParamDesc, 0, %IntMod%
HKR, Ndi\Params\*InterruptModeration, Type, 0, "enum"
HKR, Ndi\Params\*InterruptModeration\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*InterruptModeration\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*InterruptModeration, Default, 0, "1"

HKR, Ndi\Params\*FlowControl, ParamDesc, 0, %FlowCtrl%
HKR, Ndi\Params\*FlowControl, Type, 0, "enum"
HKR, Ndi\Params\*FlowControl\enum, "3", 0, %TXRXEna%
HKR, Ndi\Params\*FlowControl\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*FlowControl, Default, 0, "3"

HKR, Ndi\Params\VLanID, ParamDesc, 0, %VLanID%
HKR, Ndi\Params\VLanID, Type, 0, "long"
HKR, Ndi\Params\VLanID, Base, 0, "10"
HKR, Ndi\Params\VLanID, Min, 0, "0"
HKR, Ndi\Params\VLanID, Max, 0, "4094"
HKR, Ndi\Params\VLanID, Step, 0, "1"
HKR, Ndi\Params\VLanID, Default, 0, "0"

[WOLDefault.params]
HKR, Ndi\Params\*WakeOnMagicPacket, ParamDesc, 0, %MagicPacket%
HKR, Ndi\Params\*WakeOnMagicPacket, Type, 0, "enum"
HKR, Ndi\Params\*WakeOnMagicPacket\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*WakeOnMagicPacket\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*WakeOnMagicPacket, Default, 0, "1"

HKR, Ndi\Params\*WakeOnPattern, ParamDesc, 0, %PatternMatch%
HKR, Ndi\Params\*WakeOnPattern, Type, 0, "enum"
HKR, Ndi\Params\*WakeOnPattern\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*WakeOnPattern\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*WakeOnPattern, Default, 0, "1"

[WOLMagic.params]
HKR, Ndi\Params\*WakeOnMagicPacket, ParamDesc, 0, %MagicPacket%
HKR, Ndi\Params\*WakeOnMagicPacket, Type, 0, "enum"
HKR, Ndi\Params\*WakeOnMagicPacket\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*WakeOnMagicPacket\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*WakeOnMagicPacket, Default, 0, "1"

HKR, Ndi\Params\*WakeOnPattern, ParamDesc, 0, %PatternMatch%
HKR, Ndi\Params\*WakeOnPattern, Type, 0, "enum"
HKR, Ndi\Params\*WakeOnPattern\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*WakeOnPattern\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*WakeOnPattern, Default, 0, "0"

[WOLNone.params]
HKR, Ndi\Params\*WakeOnMagicPacket, ParamDesc, 0, %MagicPacket%
HKR, Ndi\Params\*WakeOnMagicPacket, Type, 0, "enum"
HKR, Ndi\Params\*WakeOnMagicPacket\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*WakeOnMagicPacket\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*WakeOnMagicPacket, Default, 0, "0"

HKR, Ndi\Params\*WakeOnPattern, ParamDesc, 0, %PatternMatch%
HKR, Ndi\Params\*WakeOnPattern, Type, 0, "enum"
HKR, Ndi\Params\*WakeOnPattern\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*WakeOnPattern\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*WakeOnPattern, Default, 0, "0"

[PM.params]
HKR, Ndi\Params\*PMARPOffload, ParamDesc, 0, %ARPOffload%
HKR, Ndi\Params\*PMARPOffload, Type, 0, "enum"
HKR, Ndi\Params\*PMARPOffload\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*PMARPOffload\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*PMARPOffload, Default, 0, "1"

HKR, Ndi\Params\*PMNSOffload, ParamDesc, 0, %NSOffload%
HKR, Ndi\Params\*PMNSOffload, Type, 0, "enum"
HKR, Ndi\Params\*PMNSOffload\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*PMNSOffload\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*PMNSOffload, Default, 0, "1"

[ShutOn.params]
HKR, Ndi\Params\ShutdownWake, ParamDesc, 0, %ShutDW%
HKR, Ndi\Params\ShutdownWake, Type, 0, "enum"
HKR, Ndi\Params\ShutdownWake\enum, 1, 0, %Enabled%
HKR, Ndi\Params\ShutdownWake\enum, 0, 0, %Disabled%
HKR, Ndi\Params\ShutdownWake, Default, 0, "1"

[ShutOff.params]
HKR, Ndi\Params\ShutdownWake, ParamDesc, 0, %ShutDW%
HKR, Ndi\Params\ShutdownWake, Type, 0, "enum"
HKR, Ndi\Params\ShutdownWake\enum, 1, 0, %Enabled%
HKR, Ndi\Params\ShutdownWake\enum, 0, 0, %Disabled%
HKR, Ndi\Params\ShutdownWake, Default, 0, "0"

[EEELPI.params]
HKR, Ndi\Params\*EEE, ParamDesc, 0, %EEE%
HKR, Ndi\Params\*EEE, Type, 0, "enum"
HKR, Ndi\Params\*EEE\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*EEE\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*EEE, Default, 0, "0"

[EEELPIEn.params]
HKR, Ndi\Params\*EEE, ParamDesc, 0, %EEE%
HKR, Ndi\Params\*EEE, Type, 0, "enum"
HKR, Ndi\Params\*EEE\enum, "1", 0, %Enabled%
HKR, Ndi\Params\*EEE\enum, "0", 0, %Disabled%
HKR, Ndi\Params\*EEE, Default, 0, "1"
;-----------------------------------------------------------------------------
; DestinationDirs
;
[L1C.CopyFiles]
L1C63x86.sys,,,2

[SourceDisksNames]
;
; diskid = description[, [tagfile] [, , subdir]]
;
1 = %DriverDisk%,,,

[SourceDisksFiles]
;
; filename_on_source = diskID[, [subdir][, size]]
;
L1C63x86.sys = 1

[DestinationDirs]
L1C.CopyFiles = 12
DefaultDestDir = 11

[Strings]
; Localizable strings
MSFT = "Microsoft"
ATHR = "Qualcomm Atheros"
JumboFrame = "Jumbo Frame"
2KBMTU = "2KB MTU"
3KBMTU = "3KB MTU"
4KBMTU = "4KB MTU"
5KBMTU = "5KB MTU"
6KBMTU = "6KB MTU"
7KBMTU = "7KB MTU"
8KBMTU = "8KB MTU"
9KBMTU = "9KB MTU"
IntMod = "Interrupt Moderation"
L0sL1Threshold = "L0sL1 Gateway"
MaxIrq = "Max IRQ per Second"
Enabled = "Enabled"
Disabled = "Disabled"
SpeedDuplex = "Speed & Duplex"
Auto = "Auto Negotiation"
1GFD = "1.0 Gbps Full Duplex"
10MHD = "10 Mbps Half Duplex"
10MFD = "10 Mbps Full Duplex"
100MHD = "100 Mbps Half Duplex"
100MFD = "100 Mbps Full Duplex"
FlowCtrl = "Flow Control"
ShutDW = "Shutdown Wake Up"
RSS = "Receive Side Scaling"
TXEna = "Tx Enabled"
RXEna = "Rx Enabled"
TXRXEna = "Rx & Tx Enabled"
ReceiveBuffers = "Receive Buffers"
TransmitBuffers = "Transmit Buffers"
IPChksumOffv4 = "IPv4 Checksum Offload"
TCPChksumOffv4 = "TCP Checksum Offload (IPv4)"
TCPChksumOffv6 = "TCP Checksum Offload (IPv6)"
UDPChksumOffv4 = "UDP Checksum Offload (IPv4)"
UDPChksumOffv6 = "UDP Checksum Offload (IPv6)"
LSOv1IPv4 = "Large Send Offload (IPv4)"
LSOv2IPv4 = "Large Send Offload v2 (IPv4)"
LSOv2IPv6 = "Large Send Offload v2 (IPv6)"
NetAddress = "Network Address"
WakeUpCapabilities = "Wake Up Capabilities"
APSmode = "APS mode"
AZPower = "802.3az"
None = "None"
LinkChange = "Link Change"
MagicPacket = "Wake on magic packet"
PatternMatch = "Wake on pattern match"
MagicPacket_PatternMatch = "MagicPacket & PatternMatch"
VLanID = "VLAN ID"
All = "All"
EEE = "Energy Efficient Ethernet"
ARPOffload = "ARP Offload"
NSOffload = "NS Offload"
ECMA = "ECMA"
RssQs = "Maximum Number of RSS Queues"

ATHR.L1C = "Qualcomm Atheros AR8131 PCI-E Gigabit Ethernet Controller (NDIS 6.30)"
ATHR.L2C = "Qualcomm Atheros AR8132 PCI-E Fast Ethernet Controller (NDIS 6.30)"
ATHR.L1CD = "Qualcomm Atheros AR813x/815x PCI-E Gigabit Ethernet Controller (NDIS 6.30)"
ATHR.L1D = "Qualcomm Atheros AR8151 PCI-E Gigabit Ethernet Controller (NDIS 6.30)"
ATHR.L2CB = "Qualcomm Atheros AR8152 PCI-E Fast Ethernet Controller (NDIS 6.30)"
ATHR.L1F = "Qualcomm Atheros AR8161 PCI-E Gigabit Ethernet Controller (NDIS 6.30)"
ATHR.L2F = "Qualcomm Atheros AR8162/8166/8168 PCI-E Fast Ethernet Controller (NDIS 6.30)"
ATHR.L1H = "Qualcomm Atheros AR8171/8175 PCI-E Gigabit Ethernet Controller (NDIS 6.30)"
ATHR.L2H = "Qualcomm Atheros AR8172/8176/8178 PCI-E Fast Ethernet Controller (NDIS 6.30)"
L1C.Service.DispName = "NDIS Miniport Driver for Qualcomm Atheros AR81xx PCI-E Ethernet Controller"
DriverDisk = "Qualcomm Atheros AR81xx Series PCI-E Ethernet Controller Installation Disk"
HelpText = "This Qualcomm Atheros network Controller connects you to the network."

Latest Atheros drivers

Version OS Date Downloads
12.0.0.825 Win 10 2019-01-28 572×
12.0.0.820 Win 10 2019-01-04 21528×
12.0.0.817 Win 10 2018-12-21 3276×
12.0.0.725 Win 10 2018-09-19 1281×
10.0.0.725 Win 10 2018-09-19 281×
12.0.0.722 Win 10 2018-08-29 44039×
12.0.0.720 Win 10 2018-07-30 1725×
10.0.0.720 Win 10 2018-07-30 27×
10.0.0.714 Win 10 2018-06-29 62884×
12.0.0.709 Win 10 2018-05-23 13258×

Top 10 Atheros Drivers

Version OS Date Downloads
9.2.0.104 WXP 2010-11-09 1032659×
10.0.0.313 Win 7 2015-03-11 908735×
1.0.0.36 Win 7 2010-10-22 875533×
10.0.0.328 Win 7 2015-09-17 849788×
2.1.0.21 Win 7 2013-08-09 730068×
10.0.0.329 Win 10 2015-11-26 698625×
10.0.0.297 Win 7 2014-07-22 693791×
10.0.0.336 Win 7 2016-01-29 663428×
8.0.1.314 Win 8 2013-12-24 663097×
10.0.0.274 WXP 2013-11-28 562036×

Top 10 Atheros Datasheets

Chipset Type Date Downloads
AR9285 PDF 2010-10-26 19241×
AR9485 PDF 2013-11-07 15790×
AR8031 PDF 2013-10-21 8400×
AR9331 PDF 2010-12-21 5634×
AR9287 PDF 2013-11-04 5433×
AR8035 PDF 2013-10-21 5173×
AR9462 PDF 2013-11-07 4846×
AR9285 PDF 2010-10-17 2924×
AR5007EG PDF 2006-12-01 2891×
AR9382 PDF 2013-11-04 2473×

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